Fix nacl.read.tp() intrinsic to not generate "addl %gs:0, %REG"

NaCl only allows using "mov" with a %gs prefix.

The fix requires generating the mov instruction using a custom
inserter that calls BuildMI().

Also convert the intrinsic's tests to use -filetype=asm rather than
-filetype=obj.  This avoids some limitations of llvm-objdump and is
the more normal way to write LLVM tests.

BUG=https://code.google.com/p/nativeclient/issues/detail?id=2837
TEST="llvm-lit test/NaCl"

Review URL: https://codereview.chromium.org/11410058

2 files changed, 31 insertions, 24 deletions

diff --git a/test/NaCl/ARM/nacl-read-tp-intrinsic.ll b/test/NaCl/ARM/nacl-read-tp-intrinsic.ll
index 3ad5181149..1050b902ed 100644
--- a/test/NaCl/ARM/nacl-read-tp-intrinsic.ll
+++ b/test/NaCl/ARM/nacl-read-tp-intrinsic.ll
@@ -1,10 +1,8 @@
 
-; RUN: llc -mtriple=armv7-unknown-nacl -sfi-store -filetype=obj %s -o - \
-; RUN:   | llvm-objdump -disassemble -r -triple armv7 - \
+; RUN: llc -mtriple=armv7-unknown-nacl -sfi-store -filetype=asm %s -o - \
 ; RUN:   | FileCheck -check-prefix=ARM %s
 
-; RUN: llc -mtriple=armv7-unknown-nacl -sfi-store -filetype=obj -mtls-use-call %s -o - \
-; RUN:   | llvm-objdump -disassemble -r -triple armv7 - \
+; RUN: llc -mtriple=armv7-unknown-nacl -sfi-store -filetype=asm -mtls-use-call %s -o - \
 ; RUN:   | FileCheck -check-prefix=ARM_IRT %s
 
 
@@ -15,7 +13,8 @@ define i8* @get_thread_pointer() {
   ret i8* %tp
 }
 
+; ARM: get_thread_pointer:
 ; ARM: ldr r0, [r9]
 
-; ARM_IRT: bl #
-; ARM_IRT-NEXT: __aeabi_read_tp
+; ARM_IRT: get_thread_pointer:
+; ARM_IRT: bl __aeabi_read_tp
diff --git a/test/NaCl/X86/nacl-read-tp-intrinsic.ll b/test/NaCl/X86/nacl-read-tp-intrinsic.ll
index 2ad27fb6a4..2779f1b1e1 100644
--- a/test/NaCl/X86/nacl-read-tp-intrinsic.ll
+++ b/test/NaCl/X86/nacl-read-tp-intrinsic.ll
@@ -1,20 +1,16 @@
 
-; RUN: llc -mtriple=i386-unknown-nacl -filetype=obj %s -o - \
-; RUN:   | llvm-objdump -disassemble r -triple i386 - \
+; RUN: llc -mtriple=i386-unknown-nacl -filetype=asm %s -o - \
 ; RUN:   | FileCheck -check-prefix=X32 %s
 
-; RUN: llc -mtriple=i386-unknown-nacl -filetype=obj -mtls-use-call %s -o - \
-; RUN:   | llvm-objdump -disassemble -r -triple i386 - \
-; RUN:   | FileCheck -check-prefix=X32_IRT %s
+; RUN: llc -mtriple=i386-unknown-nacl -filetype=asm -mtls-use-call %s -o - \
+; RUN:   | FileCheck -check-prefix=USE_CALL %s
 
-; RUN: llc -mtriple=x86_64-unknown-nacl -filetype=obj %s -o - \
-; RUN:   | llvm-objdump -disassemble -r -triple x86_64 - \
-; RUN:   | FileCheck -check-prefix=X64 %s
+; RUN: llc -mtriple=x86_64-unknown-nacl -filetype=asm %s -o - \
+; RUN:   | FileCheck -check-prefix=USE_CALL %s
 
 ; "-mtls-use-call" should not make any difference on x86-64.
-; RUN: llc -mtriple=x86_64-unknown-nacl -filetype=obj -mtls-use-call %s -o - \
-; RUN:   | llvm-objdump -disassemble -r -triple x86_64 - \
-; RUN:   | FileCheck -check-prefix=X64 %s
+; RUN: llc -mtriple=x86_64-unknown-nacl -filetype=asm -mtls-use-call %s -o - \
+; RUN:   | FileCheck -check-prefix=USE_CALL %s
 
 
 declare i8* @llvm.nacl.read.tp()
@@ -24,13 +20,25 @@ define i8* @get_thread_pointer() {
   ret i8* %tp
 }
 
+; X32: get_thread_pointer:
 ; X32: movl %gs:0, %eax
 
-; There appears to be a bug in llvm-objdump which stops it from
-; showing the symbol name "__nacl_read_tp" in the relocation output on
-; x86-32.
-; X32_IRT: call
-; X32_IRT-NEXT: R_386_PC32 Unknown
+; USE_CALL: get_thread_pointer:
+; USE_CALL: naclcall __nacl_read_tp
 
-; X64: call
-; X64-NEXT: __nacl_read_tp
+
+; Make sure that we do not generate:
+;   movl $1000, %eax
+;   addl %gs:0, %eax
+; The x86-32 NaCl validator only accepts %gs with "mov", not with
+; "add".  Note that we had to use a large immediate to trigger the bug
+; and generate the code above.
+define i8* @get_thread_pointer_add() {
+  %tp = call i8* @llvm.nacl.read.tp()
+  %result = getelementptr i8* %tp, i32 1000
+  ret i8* %result
+}
+
+; X32: get_thread_pointer_add:
+; X32: movl %gs:0, %eax
+; X32: addl $1000, %eax