diff options
| author | JF Bastien <jfb@chromium.org> | 2013-05-31 14:46:24 -0700 |
|---|---|---|
| committer | JF Bastien <jfb@chromium.org> | 2013-05-31 14:46:24 -0700 |
| commit | 125bbb6864c51277041e5c2faa34ec543d84544d (patch) | |
| tree | 2f11f0665c36ce9631628881ece6cc6880b90dc4 /test/NaCl | |
| parent | 2779e73d6ce7b681d8e1d3ea8a3890afe506e03a (diff) | |
Apply LLVM upstream: r182877 - Enable FastISel on ARM for Linux and NaCl
This also pulls in a TargetMachine.h change from r176986 and changes
NaCl's intrinsics-bitmanip.ll test to account for register spills at O0.
FastISel was only enabled for iOS ARM and Thumb2, this patch enables it
for ARM (not Thumb2) on Linux and NaCl.
Thumb2 support needs a bit more work, mainly around register class
restrictions.
The patch punts to SelectionDAG when doing TLS relocation on non-Darwin
targets. I will fix this and other FastISel-to-SelectionDAG failures in
a separate patch.
The patch also forces FastISel to retain frame pointers: iOS always
keeps them for backtracking (so emitted code won't change because of
this), but Linux was getting much worse code that was incorrect when
using big frames (such as test-suite's lencod). I'll also fix this in a
later patch, it will probably require a peephole so that FastISel
doesn't rematerialize frame pointers back-to-back.
The test changes are straightforward, similar to:
http://lists.cs.uiuc.edu/pipermail/llvm-commits/Week-of-Mon-20130513/174279.html
They also add a vararg test that got dropped in that change.
I ran all of test-suite on A15 hardware with --optimize-option=-O0 and
all the tests pass.
R=dschuff@chromium.org, jvoung@chromium.org
BUG= https://code.google.com/p/nativeclient/issues/detail?id=3120
Review URL: https://codereview.chromium.org/15671004
Diffstat (limited to 'test/NaCl')
| -rw-r--r-- | test/NaCl/ARM/intrinsics-bitmanip.ll | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/test/NaCl/ARM/intrinsics-bitmanip.ll b/test/NaCl/ARM/intrinsics-bitmanip.ll index 03678d3371..fc201269b3 100644 --- a/test/NaCl/ARM/intrinsics-bitmanip.ll +++ b/test/NaCl/ARM/intrinsics-bitmanip.ll @@ -43,9 +43,10 @@ define i32 @test_bswap_const_32() { } ; CHECK: test_bswap_64 -; CHECK: rev [[REG1:r[0-9]+]], {{r[0-9]+}} +; O0 spills when swapping r0/r1, whereas O2 uses r2 as a temporary. ; CHECK: rev {{r[0-9]+}}, {{r[0-9]+}} -; CHECK: mov r0, {{.*}}[[REG1]] +; CHECK: rev r1, {{r[0-9]+}} +; CHECK: mov r0, {{r[0-9]+}} define i64 @test_bswap_64(i64 %a) { %b = call i64 @llvm.bswap.i64(i64 %a) ret i64 %b |