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| author | Richard Osborne <richard@xmos.com> | 2013-02-17 22:32:41 +0000 |
|---|---|---|
| committer | Richard Osborne <richard@xmos.com> | 2013-02-17 22:32:41 +0000 |
| commit | 763c858edeb76173ee4ef5ab9bf7d750db5d8c4f (patch) | |
| tree | 737b594237e940eeaccbddf6ece0babfff498b2f /test/MC/Disassembler | |
| parent | a970dde9060d8994c242bd186bb3636d2caf22d2 (diff) | |
[XCore] Add TSETR instruction.
This instruction is not targeted by the compiler but it is needed for the
MC layer.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175406 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/MC/Disassembler')
| -rw-r--r-- | test/MC/Disassembler/XCore/xcore.txt | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/test/MC/Disassembler/XCore/xcore.txt b/test/MC/Disassembler/XCore/xcore.txt index 52c2019388..132ae12fb5 100644 --- a/test/MC/Disassembler/XCore/xcore.txt +++ b/test/MC/Disassembler/XCore/xcore.txt @@ -325,6 +325,9 @@ # CHECK: sub r4, r2, r5 0x89 0x1a +# CHECK: set t[r0]:r1, r2 +0x18 0xb8 + # 2rus instructions # CHECK: add r10, r2, 5 |