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authorEvgeniy Stepanov <eugeni.stepanov@gmail.com>2012-12-26 11:55:09 +0000
committerEvgeniy Stepanov <eugeni.stepanov@gmail.com>2012-12-26 11:55:09 +0000
commitb53be53c72ff7b3846f0ba990a889de444601e0b (patch)
tree2a45d38d479bb85cedb50a845c299cf8083df3d0 /test/Instrumentation
parentab29644a33c3cbd237a9844a1e1b69b07c6fb8c3 (diff)
[msan] Raise alignment of origin stores/loads when possible.
Origin alignment is as high as the alignment of the corresponding application location, but never less than 4. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171110 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/Instrumentation')
-rw-r--r--test/Instrumentation/MemorySanitizer/msan_basic.ll11
1 files changed, 9 insertions, 2 deletions
diff --git a/test/Instrumentation/MemorySanitizer/msan_basic.ll b/test/Instrumentation/MemorySanitizer/msan_basic.ll
index cd20329933..20957fb36f 100644
--- a/test/Instrumentation/MemorySanitizer/msan_basic.ll
+++ b/test/Instrumentation/MemorySanitizer/msan_basic.ll
@@ -56,7 +56,7 @@ entry:
; CHECK-ORIGINS: icmp
; CHECK-ORIGINS: br i1
; CHECK-ORIGINS: <label>
-; CHECK-ORIGINS-NOT: store {{.*}} align
+; CHECK-ORIGINS: store {{.*}} align 32
; CHECK-ORIGINS: br label
; CHECK-ORIGINS: <label>
; CHECK-ORIGINS: store {{.*}} align 32
@@ -362,7 +362,8 @@ define zeroext i1 @ICmpSLE(i32 %x) nounwind uwtable readnone {
; CHECK: ret i1
-; Check that loads from shadow have the same aligment as the original loads.
+; Check that loads of shadow have the same aligment as the original loads.
+; Check that loads of origin have the aligment of max(4, original alignment).
define i32 @ShadowLoadAlignmentLarge() nounwind uwtable {
%y = alloca i32, align 64
@@ -386,6 +387,12 @@ define i32 @ShadowLoadAlignmentSmall() nounwind uwtable {
; CHECK: load volatile i32* {{.*}} align 2
; CHECK: ret i32
+; CHECK-ORIGINS: @ShadowLoadAlignmentSmall
+; CHECK-ORIGINS: load i32* {{.*}} align 2
+; CHECK-ORIGINS: load i32* {{.*}} align 4
+; CHECK-ORIGINS: load volatile i32* {{.*}} align 2
+; CHECK-ORIGINS: ret i32
+
; Test vector manipulation instructions.
; Check that the same bit manipulation is applied to the shadow values.