diff options
| author | Chris Lattner <sabre@nondot.org> | 2009-03-12 06:52:53 +0000 |
|---|---|---|
| committer | Chris Lattner <sabre@nondot.org> | 2009-03-12 06:52:53 +0000 |
| commit | d1980a5acd8509ea34ee2dec5e13de5dbe16af2d (patch) | |
| tree | 287038ace4f1d384e8d4f039f22ceae688138012 /test/CodeGen | |
| parent | 2b9f4349086247c58ed0bcd17c7d11b14b14f52b (diff) | |
Move 3 "(add (select cc, 0, c), x) -> (select cc, x, (add, x, c))"
related transformations out of target-specific dag combine into the
ARM backend. These were added by Evan in r37685 with no testcases
and only seems to help ARM (e.g. test/CodeGen/ARM/select_xform.ll).
Add some simple X86-specific (for now) DAG combines that turn things
like cond ? 8 : 0 -> (zext(cond) << 3). This happens frequently
with the recently added cp constant select optimization, but is a
very general xform. For example, we now compile the second example
in const-select.ll to:
_test:
movsd LCPI2_0, %xmm0
ucomisd 8(%esp), %xmm0
seta %al
movzbl %al, %eax
movl 4(%esp), %ecx
movsbl (%ecx,%eax,4), %eax
ret
instead of:
_test:
movl 4(%esp), %eax
leal 4(%eax), %ecx
movsd LCPI2_0, %xmm0
ucomisd 8(%esp), %xmm0
cmovbe %eax, %ecx
movsbl (%ecx), %eax
ret
This passes multisource and dejagnu.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@66779 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen')
| -rw-r--r-- | test/CodeGen/X86/const-select.ll | 22 | ||||
| -rw-r--r-- | test/CodeGen/X86/mul-legalize.ll | 7 |
2 files changed, 24 insertions, 5 deletions
diff --git a/test/CodeGen/X86/const-select.ll b/test/CodeGen/X86/const-select.ll new file mode 100644 index 0000000000..6e3156beb0 --- /dev/null +++ b/test/CodeGen/X86/const-select.ll @@ -0,0 +1,22 @@ + +target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128" +target triple = "i386-apple-darwin7" + +; RUN: llvm-as < %s | llc | grep {LCPI1_0(,%eax,4)} +define float @f(i32 %x) nounwind readnone { +entry: + %0 = icmp eq i32 %x, 0 ; <i1> [#uses=1] + %iftmp.0.0 = select i1 %0, float 4.200000e+01, float 2.300000e+01 ; <float> [#uses=1] + ret float %iftmp.0.0 +} + +; RUN: llvm-as < %s | llc | grep {movsbl.*(%e.x,%e.x,4), %eax} +define signext i8 @test(i8* nocapture %P, double %F) nounwind readonly { +entry: + %0 = fcmp olt double %F, 4.200000e+01 ; <i1> [#uses=1] + %iftmp.0.0 = select i1 %0, i32 4, i32 0 ; <i32> [#uses=1] + %1 = getelementptr i8* %P, i32 %iftmp.0.0 ; <i8*> [#uses=1] + %2 = load i8* %1, align 1 ; <i8> [#uses=1] + ret i8 %2 +} + diff --git a/test/CodeGen/X86/mul-legalize.ll b/test/CodeGen/X86/mul-legalize.ll index 597806f2f9..487614f74d 100644 --- a/test/CodeGen/X86/mul-legalize.ll +++ b/test/CodeGen/X86/mul-legalize.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 | grep cmov | count 1 +; RUN: llvm-as < %s | llc -march=x86 | grep 24576 ; PR2135 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32" @@ -19,9 +19,6 @@ return: ret void } -define i1 @report__equal(i32 %x, i32 %y) nounwind { - %tmp = icmp eq i32 %x, %y - ret i1 %tmp -} +declare i1 @report__equal(i32 %x, i32 %y) nounwind; declare void @abort() |