diff options
| author | Sean Callanan <scallanan@apple.com> | 2009-11-20 22:28:42 +0000 |
|---|---|---|
| committer | Sean Callanan <scallanan@apple.com> | 2009-11-20 22:28:42 +0000 |
| commit | b9e6b34e1e6141b4eeb2d2a7ca00652923575795 (patch) | |
| tree | c622555889eb07ca25ec22ad88145a8f4497d4e1 /test/CodeGen | |
| parent | 5ca124691bc81ed013593151c500d8104f7068dd (diff) | |
Recommitting PALIGNR shift width fixes.
Thanks to Daniel Dunbar for fixing clang intrinsics:
http://llvm.org/viewvc/llvm-project?view=rev&revision=89499
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89500 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen')
| -rw-r--r-- | test/CodeGen/X86/palignr-2.ll | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/test/CodeGen/X86/palignr-2.ll b/test/CodeGen/X86/palignr-2.ll index 2936641e95..116d4c7181 100644 --- a/test/CodeGen/X86/palignr-2.ll +++ b/test/CodeGen/X86/palignr-2.ll @@ -9,12 +9,12 @@ define void @t1(<2 x i64> %a, <2 x i64> %b) nounwind ssp { entry: ; CHECK: t1: ; palignr $3, %xmm1, %xmm0 - %0 = tail call <2 x i64> @llvm.x86.ssse3.palign.r.128(<2 x i64> %a, <2 x i64> %b, i32 24) nounwind readnone + %0 = tail call <2 x i64> @llvm.x86.ssse3.palign.r.128(<2 x i64> %a, <2 x i64> %b, i8 24) nounwind readnone store <2 x i64> %0, <2 x i64>* bitcast ([4 x i32]* @c to <2 x i64>*), align 16 ret void } -declare <2 x i64> @llvm.x86.ssse3.palign.r.128(<2 x i64>, <2 x i64>, i32) nounwind readnone +declare <2 x i64> @llvm.x86.ssse3.palign.r.128(<2 x i64>, <2 x i64>, i8) nounwind readnone define void @t2() nounwind ssp { entry: @@ -22,7 +22,7 @@ entry: ; palignr $4, _b, %xmm0 %0 = load <2 x i64>* bitcast ([4 x i32]* @b to <2 x i64>*), align 16 ; <<2 x i64>> [#uses=1] %1 = load <2 x i64>* bitcast ([4 x i32]* @a to <2 x i64>*), align 16 ; <<2 x i64>> [#uses=1] - %2 = tail call <2 x i64> @llvm.x86.ssse3.palign.r.128(<2 x i64> %1, <2 x i64> %0, i32 32) nounwind readnone + %2 = tail call <2 x i64> @llvm.x86.ssse3.palign.r.128(<2 x i64> %1, <2 x i64> %0, i8 32) nounwind readnone store <2 x i64> %2, <2 x i64>* bitcast ([4 x i32]* @c to <2 x i64>*), align 16 ret void } |