aboutsummaryrefslogtreecommitdiff
path: root/test/CodeGen
diff options
context:
space:
mode:
authorJakob Stoklund Olesen <stoklund@2pi.dk>2011-07-30 00:57:25 +0000
committerJakob Stoklund Olesen <stoklund@2pi.dk>2011-07-30 00:57:25 +0000
commit4af0f5fecb42563ff3ca5bd7fddb2f4f111e2fef (patch)
tree44e100de3b58f991a1fb59c592e9f5efa487c43f /test/CodeGen
parent2e1513d9cd7750db05048fb2af0c8cac0307fc5a (diff)
Revert "Don't check liveness of unallocatable registers."
The ARM target depends on CPSR liveness being tracked after register allocation. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136548 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen')
-rw-r--r--test/CodeGen/X86/vector.ll2
1 files changed, 1 insertions, 1 deletions
diff --git a/test/CodeGen/X86/vector.ll b/test/CodeGen/X86/vector.ll
index 4268d02c5a..46b0e1890f 100644
--- a/test/CodeGen/X86/vector.ll
+++ b/test/CodeGen/X86/vector.ll
@@ -1,6 +1,6 @@
; Test that vectors are scalarized/lowered correctly.
; RUN: llc < %s -march=x86 -mcpu=i386 > %t
-; RUN: llc < %s -march=x86 -mcpu=yonah -verify-machineinstrs >> %t
+; RUN: llc < %s -march=x86 -mcpu=yonah >> %t
%d8 = type <8 x double>
%f1 = type <1 x float>