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authorMichael Liao <michael.liao@intel.com>2012-10-29 17:57:12 +0000
committerMichael Liao <michael.liao@intel.com>2012-10-29 17:57:12 +0000
commit2a2263e744130ccc7f73c88021bca4cc037eb35e (patch)
tree351c6374803f6541c3c1cfc2d6987a2be7aedb18 /test/CodeGen
parent9cc1fad5ad645247080e22dec64128bec8054341 (diff)
Fix PR14204
- Add missing pattern on X86ISD::VZEXT from VR256 to VR256 when AVX2 is enabled. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166947 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen')
-rw-r--r--test/CodeGen/X86/pr14204.ll15
1 files changed, 15 insertions, 0 deletions
diff --git a/test/CodeGen/X86/pr14204.ll b/test/CodeGen/X86/pr14204.ll
new file mode 100644
index 0000000000..42e362bf3b
--- /dev/null
+++ b/test/CodeGen/X86/pr14204.ll
@@ -0,0 +1,15 @@
+; RUN: llc < %s -mtriple=x86_64-linux-pc -mcpu=core-avx2 | FileCheck %s
+
+; FIXME: vpmovsxwd should be generated instead of vpmovzxwd followed by
+; SLL/SRA.
+
+define <8 x i32> @foo(<8 x i1> %bar) nounwind readnone {
+entry:
+ %s = sext <8 x i1> %bar to <8 x i32>
+ ret <8 x i32> %s
+; CHECK: foo
+; CHECK: vpmovzxwd
+; CHECK: vpslld
+; CHECK: vpsrad
+; CHECK: ret
+}