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authorDerek Schuff <dschuff@chromium.org>2012-09-18 15:07:33 -0700
committerDerek Schuff <dschuff@chromium.org>2012-09-18 15:07:33 -0700
commitef9bd62c68c2c279926e66058bc5a6ef62150432 (patch)
tree247f92a4e885f15dbcd37685fa9dbaa7c1db7c67 /test/CodeGen/PowerPC/fsl-e5500.ll
parent5868d5c7576d519a0bba685e7a0471ee306f5eee (diff)
parent8e70b5506ec0d7a6c2740bc89cd1b8f12a78b24f (diff)
Merge commit '8e70b5506ec0d7a6c2740bc89cd1b8f12a78b24f'
Conflicts: include/llvm/CodeGen/ISDOpcodes.h include/llvm/Target/Target.td include/llvm/Target/TargetLowering.h include/llvm/Target/TargetOpcodes.h lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.cpp lib/Target/Mips/MipsMCInstLower.cpp utils/TableGen/CodeGenTarget.cpp
Diffstat (limited to 'test/CodeGen/PowerPC/fsl-e5500.ll')
-rw-r--r--test/CodeGen/PowerPC/fsl-e5500.ll22
1 files changed, 22 insertions, 0 deletions
diff --git a/test/CodeGen/PowerPC/fsl-e5500.ll b/test/CodeGen/PowerPC/fsl-e5500.ll
new file mode 100644
index 0000000000..d47d8c8ed4
--- /dev/null
+++ b/test/CodeGen/PowerPC/fsl-e5500.ll
@@ -0,0 +1,22 @@
+;
+; Test support for Freescale e5500 and its higher memcpy inlining thresholds.
+;
+; RUN: llc -mcpu=e5500 < %s 2>&1 | FileCheck %s
+; CHECK-NOT: not a recognized processor for this target
+
+target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32:64"
+target triple = "powerpc64-fsl-linux"
+
+%struct.teststruct = type { [24 x i32], i32 }
+
+define void @copy(%struct.teststruct* noalias nocapture sret %agg.result, %struct.teststruct* nocapture %in) nounwind {
+entry:
+; CHECK: @copy
+; CHECK-NOT: bl memcpy
+ %0 = bitcast %struct.teststruct* %agg.result to i8*
+ %1 = bitcast %struct.teststruct* %in to i8*
+ tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %0, i8* %1, i64 100, i32 4, i1 false)
+ ret void
+}
+
+declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture, i8* nocapture, i64, i32, i1) nounwind