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authorAkira Hatanaka <ahatanaka@mips.com>2012-08-03 22:57:02 +0000
committerAkira Hatanaka <ahatanaka@mips.com>2012-08-03 22:57:02 +0000
commit24e79e55daa5d2812d2a5ea0a282ebe48ef465e6 (patch)
treebe3518122bdf9eb86282e31e2e212da07cc2754b /test/CodeGen/Mips/lh1.ll
parentdcc4436cddc9b5d155040ed3ed38e9070ec4e3b8 (diff)
1. Redo mips16 instructions to avoid multiple opcodes for same instruction.
Change these to patterns. 2. Add another 16 instructions. Patch by Reed Kotler. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161272 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/Mips/lh1.ll')
-rw-r--r--test/CodeGen/Mips/lh1.ll18
1 files changed, 18 insertions, 0 deletions
diff --git a/test/CodeGen/Mips/lh1.ll b/test/CodeGen/Mips/lh1.ll
new file mode 100644
index 0000000000..1f95b09034
--- /dev/null
+++ b/test/CodeGen/Mips/lh1.ll
@@ -0,0 +1,18 @@
+; RUN: llc -march=mipsel -mcpu=mips16 -relocation-model=pic -O3 < %s | FileCheck %s -check-prefix=16
+
+@s = global i16 -1, align 2
+@.str = private unnamed_addr constant [5 x i8] c"%i \0A\00", align 1
+
+define i32 @main() nounwind {
+entry:
+ %i = alloca i32, align 4
+ %0 = load i16* @s, align 2
+ %conv = sext i16 %0 to i32
+; 16: lh ${{[0-9]+}}, 0(${{[0-9]+}})
+ store i32 %conv, i32* %i, align 4
+ %1 = load i32* %i, align 4
+ %call = call i32 (i8*, ...)* @printf(i8* getelementptr inbounds ([5 x i8]* @.str, i32 0, i32 0), i32 %1)
+ ret i32 0
+}
+
+declare i32 @printf(i8*, ...)