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authorJyotsna Verma <jverma@codeaurora.org>2013-03-05 20:29:23 +0000
committerJyotsna Verma <jverma@codeaurora.org>2013-03-05 20:29:23 +0000
commit0d44328ce89b19602074676378a92c3b36bb0d83 (patch)
tree0c5b32a093ba9c056730479772bf3469d422d035 /test/CodeGen/Hexagon
parentc34f17140fb3bc66ba48af9beb5060d4064b353f (diff)
reverting patch 176508.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176513 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/Hexagon')
-rw-r--r--test/CodeGen/Hexagon/block-addr.ll64
-rw-r--r--test/CodeGen/Hexagon/indirect-br.ll14
2 files changed, 0 insertions, 78 deletions
diff --git a/test/CodeGen/Hexagon/block-addr.ll b/test/CodeGen/Hexagon/block-addr.ll
deleted file mode 100644
index 54a12bf484..0000000000
--- a/test/CodeGen/Hexagon/block-addr.ll
+++ /dev/null
@@ -1,64 +0,0 @@
-; RUN: llc -march=hexagon < %s | FileCheck %s
-
-; CHECK: r{{[0-9]+}} = CONST32(#.LJTI{{[0-9]+_[0-9]+}})
-; CHECK: r{{[0-9]+}} = memw(r{{[0-9]+}}+r{{[0-9]+<<#[0-9]+}})
-; CHECK: jumpr r{{[0-9]+}}
-
-define void @main() #0 {
-entry:
- %ret = alloca i32, align 4
- br label %while.body
-
-while.body:
- %ret.0.load17 = load volatile i32* %ret, align 4
- switch i32 %ret.0.load17, label %label6 [
- i32 0, label %label0
- i32 1, label %label1
- i32 2, label %label2
- i32 3, label %label3
- i32 4, label %label4
- i32 5, label %label5
- ]
-
-label0:
- %ret.0.load18 = load volatile i32* %ret, align 4
- %inc = add nsw i32 %ret.0.load18, 1
- store volatile i32 %inc, i32* %ret, align 4
- br label %while.body
-
-label1:
- %ret.0.load19 = load volatile i32* %ret, align 4
- %inc2 = add nsw i32 %ret.0.load19, 1
- store volatile i32 %inc2, i32* %ret, align 4
- br label %while.body
-
-label2:
- %ret.0.load20 = load volatile i32* %ret, align 4
- %inc4 = add nsw i32 %ret.0.load20, 1
- store volatile i32 %inc4, i32* %ret, align 4
- br label %while.body
-
-label3:
- %ret.0.load21 = load volatile i32* %ret, align 4
- %inc6 = add nsw i32 %ret.0.load21, 1
- store volatile i32 %inc6, i32* %ret, align 4
- br label %while.body
-
-label4:
- %ret.0.load22 = load volatile i32* %ret, align 4
- %inc8 = add nsw i32 %ret.0.load22, 1
- store volatile i32 %inc8, i32* %ret, align 4
- br label %while.body
-
-label5:
- %ret.0.load23 = load volatile i32* %ret, align 4
- %inc10 = add nsw i32 %ret.0.load23, 1
- store volatile i32 %inc10, i32* %ret, align 4
- br label %while.body
-
-label6:
- store volatile i32 0, i32* %ret, align 4
- br label %while.body
-}
-
-attributes #0 = { noreturn nounwind "target-cpu"="hexagonv4" }
diff --git a/test/CodeGen/Hexagon/indirect-br.ll b/test/CodeGen/Hexagon/indirect-br.ll
deleted file mode 100644
index 919e501891..0000000000
--- a/test/CodeGen/Hexagon/indirect-br.ll
+++ /dev/null
@@ -1,14 +0,0 @@
-; RUN: llc -march=hexagon < %s | FileCheck %s
-
-;CHECK: jumpr r{{[0-9]+}}
-
-define i32 @check_indirect_br(i8* %target) nounwind {
-entry:
- indirectbr i8* %target, [label %test_label]
-
-test_label:
- br label %ret
-
-ret:
- ret i32 -1
-} \ No newline at end of file