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| author | Chad Rosier <mcrosier@apple.com> | 2011-11-14 22:46:17 +0000 |
|---|---|---|
| committer | Chad Rosier <mcrosier@apple.com> | 2011-11-14 22:46:17 +0000 |
| commit | 909cb4f2f2d227ea01852cb318c80a79c46bc9bf (patch) | |
| tree | 0d72868df4d6c519803c7ed08b285e8f495273d4 /test/CodeGen/ARM | |
| parent | e489af8dce12249be26ac0c8e371557378886bc2 (diff) | |
Add support for inlining small memcpys.
rdar://10412592
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144578 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/ARM')
| -rw-r--r-- | test/CodeGen/ARM/fast-isel-intrinsic.ll | 34 |
1 files changed, 31 insertions, 3 deletions
diff --git a/test/CodeGen/ARM/fast-isel-intrinsic.ll b/test/CodeGen/ARM/fast-isel-intrinsic.ll index 9a924b491b..3ef8bce5fd 100644 --- a/test/CodeGen/ARM/fast-isel-intrinsic.ll +++ b/test/CodeGen/ARM/fast-isel-intrinsic.ll @@ -33,7 +33,7 @@ define void @t2() nounwind ssp { ; ARM: ldr r0, [r0] ; ARM: add r1, r0, #4 ; ARM: add r0, r0, #16 -; ARM: movw r2, #10 +; ARM: movw r2, #17 ; ARM: str r0, [sp] @ 4-byte Spill ; ARM: mov r0, r1 ; ARM: ldr r1, [sp] @ 4-byte Reload @@ -43,11 +43,11 @@ define void @t2() nounwind ssp { ; THUMB: ldr r0, [r0] ; THUMB: adds r1, r0, #4 ; THUMB: adds r0, #16 -; THUMB: movs r2, #10 +; THUMB: movs r2, #17 ; THUMB: movt r2, #0 ; THUMB: mov r0, r1 ; THUMB: bl _memcpy - call void @llvm.memcpy.p0i8.p0i8.i32(i8* getelementptr inbounds ([60 x i8]* @temp, i32 0, i32 4), i8* getelementptr inbounds ([60 x i8]* @temp, i32 0, i32 16), i32 10, i32 1, i1 false) + call void @llvm.memcpy.p0i8.p0i8.i32(i8* getelementptr inbounds ([60 x i8]* @temp, i32 0, i32 4), i8* getelementptr inbounds ([60 x i8]* @temp, i32 0, i32 16), i32 17, i32 1, i1 false) ret void } @@ -75,4 +75,32 @@ define void @t3() nounwind ssp { ret void } +define void @t4() nounwind ssp { +; ARM: t4 +; ARM: ldr r0, LCPI3_0 +; ARM: ldr r0, [r0] +; ARM: ldr r1, LCPI3_1 +; ARM: ldr r1, [r1] +; ARM: ldr r2, [r1, #16] +; ARM: str r2, [r0, #4] +; ARM: ldr r2, [r1, #20] +; ARM: str r2, [r0, #8] +; ARM: ldrh r1, [r1, #24] +; ARM: strh r1, [r0, #12] +; ARM: bx lr +; THUMB: ldr.n r0, LCPI3_0 +; THUMB: ldr r0, [r0] +; THUMB: ldr.n r1, LCPI3_1 +; THUMB: ldr r1, [r1] +; THUMB: ldr r2, [r1, #16] +; THUMB: str r2, [r0, #4] +; THUMB: ldr r2, [r1, #20] +; THUMB: str r2, [r0, #8] +; THUMB: ldrh r1, [r1, #24] +; THUMB: strh r1, [r0, #12] +; THUMB: bx lr + call void @llvm.memcpy.p0i8.p0i8.i32(i8* getelementptr inbounds ([60 x i8]* @temp, i32 0, i32 4), i8* getelementptr inbounds ([60 x i8]* @temp, i32 0, i32 16), i32 10, i32 1, i1 false) + ret void +} + declare void @llvm.memmove.p0i8.p0i8.i32(i8* nocapture, i8* nocapture, i32, i32, i1) nounwind |