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authorEric Christopher <echristo@apple.com>2011-07-01 01:00:07 +0000
committerEric Christopher <echristo@apple.com>2011-07-01 01:00:07 +0000
commit5e653c925c7da969c3fb5fa9a46263ffb160b81e (patch)
treea7359b33afbdc323fc4d59a23f163c59d227e570 /test/CodeGen/ARM
parent30cb6dda5ae441f27edef302cbb33936fbafba6d (diff)
Add support for the 'j' immediate constraint. This is conditionalized on
supporting the instruction that the constraint is for 'movw'. Part of rdar://9119939 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134222 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/ARM')
-rw-r--r--test/CodeGen/ARM/inlineasm3.ll16
1 files changed, 13 insertions, 3 deletions
diff --git a/test/CodeGen/ARM/inlineasm3.ll b/test/CodeGen/ARM/inlineasm3.ll
index 00257e1cdb..853585d949 100644
--- a/test/CodeGen/ARM/inlineasm3.ll
+++ b/test/CodeGen/ARM/inlineasm3.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=arm -mattr=+neon | FileCheck %s
+; RUN: llc < %s -march=arm -mattr=+neon,+v6t2 | FileCheck %s
; Radar 7449043
%struct.int32x4_t = type { <4 x i32> }
@@ -71,7 +71,7 @@ entry:
; Radar 9307836 & 9119939
-define double @t7(double %y) nounwind ssp {
+define double @t7(double %y) nounwind {
entry:
; CHECK: t7
; CHECK: flds s15, d0
@@ -81,10 +81,20 @@ entry:
; Radar 9307836 & 9119939
-define float @t8(float %y) nounwind ssp {
+define float @t8(float %y) nounwind {
entry:
; CHECK: t8
; CHECK: flds s15, s0
%0 = tail call float asm "flds s15, $0", "=t"() nounwind
ret float %0
}
+
+; Radar 9307836 & 9119939
+
+define i32 @t9(i32 %r0) nounwind {
+entry:
+; CHECK: t9
+; CHECK: movw r0, #27182
+ %0 = tail call i32 asm "movw $0, $1", "=r,j"(i32 27182) nounwind
+ ret i32 %0
+}