diff options
| author | Chris Lattner <sabre@nondot.org> | 2007-03-06 20:01:06 +0000 |
|---|---|---|
| committer | Chris Lattner <sabre@nondot.org> | 2007-03-06 20:01:06 +0000 |
| commit | edf2e8da256496c19390cfd46da80746373e9989 (patch) | |
| tree | 27d5a19c76a5d7ee5fbffe3fc72850adbf0750d8 /lib | |
| parent | 622adea47feebbab6119e7863475b479880d70ba (diff) | |
big endian 32-bit systems (e.g. ppc32) want to return the high reg first, not
the lo-reg first. This is fallout from my ppc calling conv change yesterday,
it fixes test/ExecutionEngine/2003-05-06-LivenessClobber.llx
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34983 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib')
| -rw-r--r-- | lib/CodeGen/SelectionDAG/LegalizeDAG.cpp | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp b/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp index 84a381bf63..8c90cfb6da 100644 --- a/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp +++ b/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp @@ -1675,6 +1675,11 @@ SDOperand SelectionDAGLegalize::LegalizeOp(SDOperand Op) { if (Tmp2.getValueType() != MVT::Vector) { SDOperand Lo, Hi; ExpandOp(Tmp2, Lo, Hi); + + // Big endian systems want the hi reg first. + if (!TLI.isLittleEndian()) + std::swap(Lo, Hi); + if (Hi.Val) Result = DAG.getNode(ISD::RET, MVT::Other, Tmp1, Lo, Tmp3, Hi,Tmp3); else |