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authorJohnny Chen <johnny.chen@apple.com>2011-03-24 20:42:48 +0000
committerJohnny Chen <johnny.chen@apple.com>2011-03-24 20:42:48 +0000
commite6d69e7dbee88a0a88f252a3e1e3f5f81472cf4b (patch)
tree303555abce960ceb8f0aed03bc6d71c4a40d0a6e /lib
parent23670e5b95fcaf88238239729457393b8cc831ff (diff)
ADR was added with the wrong encoding for inst{24-21}, and the ARM decoder was fooled.
Set the encoding bits to {0,?,?,0}, not 0. Plus delegate the disassembly of ADR to the more generic ADDri/SUBri instructions, and add a test case for that. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128234 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib')
-rw-r--r--lib/Target/ARM/ARMInstrInfo.td2
1 files changed, 1 insertions, 1 deletions
diff --git a/lib/Target/ARM/ARMInstrInfo.td b/lib/Target/ARM/ARMInstrInfo.td
index 9d09a65da4..cc4fcfc3c8 100644
--- a/lib/Target/ARM/ARMInstrInfo.td
+++ b/lib/Target/ARM/ARMInstrInfo.td
@@ -1253,7 +1253,7 @@ let neverHasSideEffects = 1, isReMaterializable = 1 in
// The 'adr' mnemonic encodes differently if the label is before or after
// the instruction. The {24-21} opcode bits are set by the fixup, as we don't
// know until then which form of the instruction will be used.
-def ADR : AI1<0, (outs GPR:$Rd), (ins adrlabel:$label),
+def ADR : AI1<{0,?,?,0}, (outs GPR:$Rd), (ins adrlabel:$label),
MiscFrm, IIC_iALUi, "adr", "\t$Rd, #$label", []> {
bits<4> Rd;
bits<12> label;