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authorTom Stellard <thomas.stellard@amd.com>2013-07-08 21:20:22 +0000
committerTom Stellard <thomas.stellard@amd.com>2013-07-08 21:20:22 +0000
commitc4a246996dc37c02958fdbe968c25a5d03a51908 (patch)
treef9d913f0dd7c19585c3c2abc167aed63d382b70c /lib
parentce337502f5a88500df9ab2f59ab48f97be0b4395 (diff)
R600: Fix R600ControlFlowFinalizer not considering VTX_READ 128 bit dst reg
Patch by: Vincent Lejeune https://bugs.freedesktop.org/show_bug.cgi?id=64877 NOTE: This is a candidate for the 3.3 branch. Merged from r182600 Author: Tom Stellard <thomas.stellard@amd.com> Date: Thu May 23 18:26:42 2013 +0000 git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_33@185868 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib')
-rw-r--r--lib/Target/R600/R600ControlFlowFinalizer.cpp11
1 files changed, 9 insertions, 2 deletions
diff --git a/lib/Target/R600/R600ControlFlowFinalizer.cpp b/lib/Target/R600/R600ControlFlowFinalizer.cpp
index ffe3414413..7d3a0f52de 100644
--- a/lib/Target/R600/R600ControlFlowFinalizer.cpp
+++ b/lib/Target/R600/R600ControlFlowFinalizer.cpp
@@ -116,8 +116,15 @@ private:
const MachineOperand &MO = *I;
if (!MO.isReg())
continue;
- if (MO.isDef())
- DstMI = MO.getReg();
+ if (MO.isDef()) {
+ unsigned Reg = MO.getReg();
+ if (AMDGPU::R600_Reg128RegClass.contains(Reg))
+ DstMI = Reg;
+ else
+ DstMI = TRI.getMatchingSuperReg(Reg,
+ TRI.getSubRegFromChannel(TRI.getHWRegChan(Reg)),
+ &AMDGPU::R600_Reg128RegClass);
+ }
if (MO.isUse()) {
unsigned Reg = MO.getReg();
if (AMDGPU::R600_Reg128RegClass.contains(Reg))