diff options
author | Dan Gohman <gohman@apple.com> | 2009-06-04 22:49:04 +0000 |
---|---|---|
committer | Dan Gohman <gohman@apple.com> | 2009-06-04 22:49:04 +0000 |
commit | ae3a0be92e33bc716722aa600983fc1535acb122 (patch) | |
tree | 768333097a76cc105813c7c636daf6259e6a0fc7 /lib | |
parent | d18e31ae17390d9c6f6cf93d18badf962452031d (diff) |
Split the Add, Sub, and Mul instruction opcodes into separate
integer and floating-point opcodes, introducing
FAdd, FSub, and FMul.
For now, the AsmParser, BitcodeReader, and IRBuilder all preserve
backwards compatability, and the Core LLVM APIs preserve backwards
compatibility for IR producers. Most front-ends won't need to change
immediately.
This implements the first step of the plan outlined here:
http://nondot.org/sabre/LLVMNotes/IntegerOverflow.txt
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72897 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib')
26 files changed, 446 insertions, 211 deletions
diff --git a/lib/Analysis/ValueTracking.cpp b/lib/Analysis/ValueTracking.cpp index 29ff8aa4f4..45f97b8f64 100644 --- a/lib/Analysis/ValueTracking.cpp +++ b/lib/Analysis/ValueTracking.cpp @@ -771,7 +771,7 @@ bool llvm::CannotBeNegativeZero(const Value *V, unsigned Depth) { if (I == 0) return false; // (add x, 0.0) is guaranteed to return +0.0, not -0.0. - if (I->getOpcode() == Instruction::Add && + if (I->getOpcode() == Instruction::FAdd && isa<ConstantFP>(I->getOperand(1)) && cast<ConstantFP>(I->getOperand(1))->isNullValue()) return true; diff --git a/lib/AsmParser/LLLexer.cpp b/lib/AsmParser/LLLexer.cpp index 340cfe152f..2cfb36656a 100644 --- a/lib/AsmParser/LLLexer.cpp +++ b/lib/AsmParser/LLLexer.cpp @@ -591,7 +591,9 @@ lltok::Kind LLLexer::LexIdentifier() { if (Len == strlen(#STR) && !memcmp(StartChar, #STR, strlen(#STR))) { \ UIntVal = Instruction::Enum; return lltok::kw_##STR; } - INSTKEYWORD(add, Add); INSTKEYWORD(sub, Sub); INSTKEYWORD(mul, Mul); + INSTKEYWORD(add, Add); INSTKEYWORD(fadd, FAdd); + INSTKEYWORD(sub, Sub); INSTKEYWORD(fsub, FSub); + INSTKEYWORD(mul, Mul); INSTKEYWORD(fmul, FMul); INSTKEYWORD(udiv, UDiv); INSTKEYWORD(sdiv, SDiv); INSTKEYWORD(fdiv, FDiv); INSTKEYWORD(urem, URem); INSTKEYWORD(srem, SRem); INSTKEYWORD(frem, FRem); INSTKEYWORD(shl, Shl); INSTKEYWORD(lshr, LShr); INSTKEYWORD(ashr, AShr); diff --git a/lib/AsmParser/LLParser.cpp b/lib/AsmParser/LLParser.cpp index 4f8be889c7..b4577ad726 100644 --- a/lib/AsmParser/LLParser.cpp +++ b/lib/AsmParser/LLParser.cpp @@ -1835,8 +1835,11 @@ bool LLParser::ParseValID(ValID &ID) { // Binary Operators. case lltok::kw_add: + case lltok::kw_fadd: case lltok::kw_sub: + case lltok::kw_fsub: case lltok::kw_mul: + case lltok::kw_fmul: case lltok::kw_udiv: case lltok::kw_sdiv: case lltok::kw_fdiv: @@ -2400,8 +2403,13 @@ bool LLParser::ParseInstruction(Instruction *&Inst, BasicBlock *BB, // Binary Operators. case lltok::kw_add: case lltok::kw_sub: - case lltok::kw_mul: return ParseArithmetic(Inst, PFS, KeywordVal, 0); - + case lltok::kw_mul: + // API compatibility: Accept either integer or floating-point types. + return ParseArithmetic(Inst, PFS, KeywordVal, 0); + case lltok::kw_fadd: + case lltok::kw_fsub: + case lltok::kw_fmul: return ParseArithmetic(Inst, PFS, KeywordVal, 2); + case lltok::kw_udiv: case lltok::kw_sdiv: case lltok::kw_urem: diff --git a/lib/AsmParser/LLToken.h b/lib/AsmParser/LLToken.h index 2d1cfa5a05..c2ce5601d4 100644 --- a/lib/AsmParser/LLToken.h +++ b/lib/AsmParser/LLToken.h @@ -90,7 +90,8 @@ namespace lltok { kw_ueq, kw_une, // Instruction Opcodes (Opcode in UIntVal). - kw_add, kw_sub, kw_mul, kw_udiv, kw_sdiv, kw_fdiv, + kw_add, kw_fadd, kw_sub, kw_fsub, kw_mul, kw_fmul, + kw_udiv, kw_sdiv, kw_fdiv, kw_urem, kw_srem, kw_frem, kw_shl, kw_lshr, kw_ashr, kw_and, kw_or, kw_xor, kw_icmp, kw_fcmp, kw_vicmp, kw_vfcmp, diff --git a/lib/Bitcode/Reader/BitcodeReader.cpp b/lib/Bitcode/Reader/BitcodeReader.cpp index 1dad04bd8f..3b44f56421 100644 --- a/lib/Bitcode/Reader/BitcodeReader.cpp +++ b/lib/Bitcode/Reader/BitcodeReader.cpp @@ -104,9 +104,12 @@ static int GetDecodedCastOpcode(unsigned Val) { static int GetDecodedBinaryOpcode(unsigned Val, const Type *Ty) { switch (Val) { default: return -1; - case bitc::BINOP_ADD: return Instruction::Add; - case bitc::BINOP_SUB: return Instruction::Sub; - case bitc::BINOP_MUL: return Instruction::Mul; + case bitc::BINOP_ADD: + return Ty->isFPOrFPVector() ? Instruction::FAdd : Instruction::Add; + case bitc::BINOP_SUB: + return Ty->isFPOrFPVector() ? Instruction::FSub : Instruction::Sub; + case bitc::BINOP_MUL: + return Ty->isFPOrFPVector() ? Instruction::FMul : Instruction::Mul; case bitc::BINOP_UDIV: return Instruction::UDiv; case bitc::BINOP_SDIV: return Ty->isFPOrFPVector() ? Instruction::FDiv : Instruction::SDiv; diff --git a/lib/Bitcode/Writer/BitcodeWriter.cpp b/lib/Bitcode/Writer/BitcodeWriter.cpp index bfc029c1f2..9f16728d49 100644 --- a/lib/Bitcode/Writer/BitcodeWriter.cpp +++ b/lib/Bitcode/Writer/BitcodeWriter.cpp @@ -77,9 +77,12 @@ static unsigned GetEncodedCastOpcode(unsigned Opcode) { static unsigned GetEncodedBinaryOpcode(unsigned Opcode) { switch (Opcode) { default: assert(0 && "Unknown binary instruction!"); - case Instruction::Add: return bitc::BINOP_ADD; - case Instruction::Sub: return bitc::BINOP_SUB; - case Instruction::Mul: return bitc::BINOP_MUL; + case Instruction::Add: + case Instruction::FAdd: return bitc::BINOP_ADD; + case Instruction::Sub: + case Instruction::FSub: return bitc::BINOP_SUB; + case Instruction::Mul: + case Instruction::FMul: return bitc::BINOP_MUL; case Instruction::UDiv: return bitc::BINOP_UDIV; case Instruction::FDiv: case Instruction::SDiv: return bitc::BINOP_SDIV; diff --git a/lib/CodeGen/SelectionDAG/FastISel.cpp b/lib/CodeGen/SelectionDAG/FastISel.cpp index 6becff3217..4a7dbebe2d 100644 --- a/lib/CodeGen/SelectionDAG/FastISel.cpp +++ b/lib/CodeGen/SelectionDAG/FastISel.cpp @@ -639,18 +639,18 @@ FastISel::FastEmitBranch(MachineBasicBlock *MSucc) { bool FastISel::SelectOperator(User *I, unsigned Opcode) { switch (Opcode) { - case Instruction::Add: { - ISD::NodeType Opc = I->getType()->isFPOrFPVector() ? ISD::FADD : ISD::ADD; - return SelectBinaryOp(I, Opc); - } - case Instruction::Sub: { - ISD::NodeType Opc = I->getType()->isFPOrFPVector() ? ISD::FSUB : ISD::SUB; - return SelectBinaryOp(I, Opc); - } - case Instruction::Mul: { - ISD::NodeType Opc = I->getType()->isFPOrFPVector() ? ISD::FMUL : ISD::MUL; - return SelectBinaryOp(I, Opc); - } + case Instruction::Add: + return SelectBinaryOp(I, ISD::ADD); + case Instruction::FAdd: + return SelectBinaryOp(I, ISD::FADD); + case Instruction::Sub: + return SelectBinaryOp(I, ISD::SUB); + case Instruction::FSub: + return SelectBinaryOp(I, ISD::FSUB); + case Instruction::Mul: + return SelectBinaryOp(I, ISD::MUL); + case Instruction::FMul: + return SelectBinaryOp(I, ISD::FMUL); case Instruction::SDiv: return SelectBinaryOp(I, ISD::SDIV); case Instruction::UDiv: diff --git a/lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp b/lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp index 889d7f5dd9..93750d6b98 100644 --- a/lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp +++ b/lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp @@ -842,20 +842,6 @@ void SelectionDAGLowering::visit(unsigned Opcode, User &I) { } } -void SelectionDAGLowering::visitAdd(User &I) { - if (I.getType()->isFPOrFPVector()) - visitBinary(I, ISD::FADD); - else - visitBinary(I, ISD::ADD); -} - -void SelectionDAGLowering::visitMul(User &I) { - if (I.getType()->isFPOrFPVector()) - visitBinary(I, ISD::FMUL); - else - visitBinary(I, ISD::MUL); -} - SDValue SelectionDAGLowering::getValue(const Value *V) { SDValue &N = NodeMap[V]; if (N.getNode()) return N; @@ -2161,37 +2147,33 @@ void SelectionDAGLowering::visitSwitch(SwitchInst &SI) { } -void SelectionDAGLowering::visitSub(User &I) { +void SelectionDAGLowering::visitFSub(User &I) { // -0.0 - X --> fneg const Type *Ty = I.getType(); if (isa<VectorType>(Ty)) { if (ConstantVector *CV = dyn_cast<ConstantVector>(I.getOperand(0))) { const VectorType *DestTy = cast<VectorType>(I.getType()); const Type *ElTy = DestTy->getElementType(); - if (ElTy->isFloatingPoint()) { - unsigned VL = DestTy->getNumElements(); - std::vector<Constant*> NZ(VL, ConstantFP::getNegativeZero(ElTy)); - Constant *CNZ = ConstantVector::get(&NZ[0], NZ.size()); - if (CV == CNZ) { - SDValue Op2 = getValue(I.getOperand(1)); - setValue(&I, DAG.getNode(ISD::FNEG, getCurDebugLoc(), - Op2.getValueType(), Op2)); - return; - } - } - } - } - if (Ty->isFloatingPoint()) { - if (ConstantFP *CFP = dyn_cast<ConstantFP>(I.getOperand(0))) - if (CFP->isExactlyValue(ConstantFP::getNegativeZero(Ty)->getValueAPF())) { + unsigned VL = DestTy->getNumElements(); + std::vector<Constant*> NZ(VL, ConstantFP::getNegativeZero(ElTy)); + Constant *CNZ = ConstantVector::get(&NZ[0], NZ.size()); + if (CV == CNZ) { SDValue Op2 = getValue(I.getOperand(1)); setValue(&I, DAG.getNode(ISD::FNEG, getCurDebugLoc(), Op2.getValueType(), Op2)); return; } + } } + if (ConstantFP *CFP = dyn_cast<ConstantFP>(I.getOperand(0))) + if (CFP->isExactlyValue(ConstantFP::getNegativeZero(Ty)->getValueAPF())) { + SDValue Op2 = getValue(I.getOperand(1)); + setValue(&I, DAG.getNode(ISD::FNEG, getCurDebugLoc(), + Op2.getValueType(), Op2)); + return; + } - visitBinary(I, Ty->isFPOrFPVector() ? ISD::FSUB : ISD::SUB); + visitBinary(I, ISD::FSUB); } void SelectionDAGLowering::visitBinary(User &I, unsigned OpCode) { diff --git a/lib/CodeGen/SelectionDAG/SelectionDAGBuild.h b/lib/CodeGen/SelectionDAG/SelectionDAGBuild.h index 578aa591ce..057c8410da 100644 --- a/lib/CodeGen/SelectionDAG/SelectionDAGBuild.h +++ b/lib/CodeGen/SelectionDAG/SelectionDAGBuild.h @@ -469,9 +469,12 @@ private: void visitBinary(User &I, unsigned OpCode); void visitShift(User &I, unsigned Opcode); - void visitAdd(User &I); - void visitSub(User &I); - void visitMul(User &I); + void visitAdd(User &I) { visitBinary(I, ISD::ADD); } + void visitFAdd(User &I) { visitBinary(I, ISD::FADD); } + void visitSub(User &I) { visitBinary(I, ISD::SUB); } + void visitFSub(User &I); + void visitMul(User &I) { visitBinary(I, ISD::MUL); } + void visitFMul(User &I) { visitBinary(I, ISD::FMUL); } void visitURem(User &I) { visitBinary(I, ISD::UREM); } void visitSRem(User &I) { visitBinary(I, ISD::SREM); } void visitFRem(User &I) { visitBinary(I, ISD::FREM); } diff --git a/lib/ExecutionEngine/ExecutionEngine.cpp b/lib/ExecutionEngine/ExecutionEngine.cpp index 29a05bbbdb..a80513f3df 100644 --- a/lib/ExecutionEngine/ExecutionEngine.cpp +++ b/lib/ExecutionEngine/ExecutionEngine.cpp @@ -573,8 +573,11 @@ GenericValue ExecutionEngine::getConstantValue(const Constant *C) { return GV; } case Instruction::Add: + case Instruction::FAdd: case Instruction::Sub: + case Instruction::FSub: case Instruction::Mul: + case Instruction::FMul: case Instruction::UDiv: case Instruction::SDiv: case Instruction::URem: @@ -605,11 +608,11 @@ GenericValue ExecutionEngine::getConstantValue(const Constant *C) { case Type::FloatTyID: switch (CE->getOpcode()) { default: assert(0 && "Invalid float opcode"); abort(); - case Instruction::Add: + case Instruction::FAdd: GV.FloatVal = LHS.FloatVal + RHS.FloatVal; break; - case Instruction::Sub: + case Instruction::FSub: GV.FloatVal = LHS.FloatVal - RHS.FloatVal; break; - case Instruction::Mul: + case Instruction::FMul: GV.FloatVal = LHS.FloatVal * RHS.FloatVal; break; case Instruction::FDiv: GV.FloatVal = LHS.FloatVal / RHS.FloatVal; break; @@ -620,11 +623,11 @@ GenericValue ExecutionEngine::getConstantValue(const Constant *C) { case Type::DoubleTyID: switch (CE->getOpcode()) { default: assert(0 && "Invalid double opcode"); abort(); - case Instruction::Add: + case Instruction::FAdd: GV.DoubleVal = LHS.DoubleVal + RHS.DoubleVal; break; - case Instruction::Sub: + case Instruction::FSub: GV.DoubleVal = LHS.DoubleVal - RHS.DoubleVal; break; - case Instruction::Mul: + case Instruction::FMul: GV.DoubleVal = LHS.DoubleVal * RHS.DoubleVal; break; case Instruction::FDiv: GV.DoubleVal = LHS.DoubleVal / RHS.DoubleVal; break; @@ -638,15 +641,15 @@ GenericValue ExecutionEngine::getConstantValue(const Constant *C) { APFloat apfLHS = APFloat(LHS.IntVal); switch (CE->getOpcode()) { default: assert(0 && "Invalid long double opcode"); abort(); - case Instruction::Add: + case Instruction::FAdd: apfLHS.add(APFloat(RHS.IntVal), APFloat::rmNearestTiesToEven); GV.IntVal = apfLHS.bitcastToAPInt(); break; - case Instruction::Sub: + case Instruction::FSub: apfLHS.subtract(APFloat(RHS.IntVal), APFloat::rmNearestTiesToEven); GV.IntVal = apfLHS.bitcastToAPInt(); break; - case Instruction::Mul: + case Instruction::FMul: apfLHS.multiply(APFloat(RHS.IntVal), APFloat::rmNearestTiesToEven); GV.IntVal = apfLHS.bitcastToAPInt(); break; diff --git a/lib/ExecutionEngine/Interpreter/Execution.cpp b/lib/ExecutionEngine/Interpreter/Execution.cpp index 765fed248f..7dfeae0ab2 100644 --- a/lib/ExecutionEngine/Interpreter/Execution.cpp +++ b/lib/ExecutionEngine/Interpreter/Execution.cpp @@ -64,45 +64,35 @@ void Interpreter::initializeExecutionEngine() { Dest.TY##Val = Src1.TY##Val OP Src2.TY##Val; \ break -#define IMPLEMENT_INTEGER_BINOP1(OP, TY) \ - case Type::IntegerTyID: { \ - Dest.IntVal = Src1.IntVal OP Src2.IntVal; \ - break; \ - } - - -static void executeAddInst(GenericValue &Dest, GenericValue Src1, - GenericValue Src2, const Type *Ty) { +static void executeFAddInst(GenericValue &Dest, GenericValue Src1, + GenericValue Src2, const Type *Ty) { switch (Ty->getTypeID()) { - IMPLEMENT_INTEGER_BINOP1(+, Ty); IMPLEMENT_BINARY_OPERATOR(+, Float); IMPLEMENT_BINARY_OPERATOR(+, Double); default: - cerr << "Unhandled type for Add instruction: " << *Ty << "\n"; + cerr << "Unhandled type for FAdd instruction: " << *Ty << "\n"; abort(); } } -static void executeSubInst(GenericValue &Dest, GenericValue Src1, - GenericValue Src2, const Type *Ty) { +static void executeFSubInst(GenericValue &Dest, GenericValue Src1, + GenericValue Src2, const Type *Ty) { switch (Ty->getTypeID()) { - IMPLEMENT_INTEGER_BINOP1(-, Ty); IMPLEMENT_BINARY_OPERATOR(-, Float); IMPLEMENT_BINARY_OPERATOR(-, Double); default: - cerr << "Unhandled type for Sub instruction: " << *Ty << "\n"; + cerr << "Unhandled type for FSub instruction: " << *Ty << "\n"; abort(); } } -static void executeMulInst(GenericValue &Dest, GenericValue Src1, - GenericValue Src2, const Type *Ty) { +static void executeFMulInst(GenericValue &Dest, GenericValue Src1, + GenericValue Src2, const Type *Ty) { switch (Ty->getTypeID()) { - IMPLEMENT_INTEGER_BINOP1(*, Ty); IMPLEMENT_BINARY_OPERATOR(*, Float); IMPLEMENT_BINARY_OPERATOR(*, Double); default: - cerr << "Unhandled type for Mul instruction: " << *Ty << "\n"; + cerr << "Unhandled type for FMul instruction: " << *Ty << "\n"; abort(); } } @@ -550,11 +540,14 @@ void Interpreter::visitBinaryOperator(BinaryOperator &I) { GenericValue R; // Result switch (I.getOpcode()) { - case Instruction::Add: executeAddInst (R, Src1, Src2, Ty); break; - case Instruction::Sub: executeSubInst (R, Src1, Src2, Ty); break; - case Instruction::Mul: executeMulInst (R, Src1, Src2, Ty); break; - case Instruction::FDiv: executeFDivInst (R, Src1, Src2, Ty); break; - case Instruction::FRem: executeFRemInst (R, Src1, Src2, Ty); break; + case Instruction::Add: R.IntVal = Src1.IntVal + Src2.IntVal; break; + case Instruction::Sub: R.IntVal = Src1.IntVal - Src2.IntVal; break; + case Instruction::Mul: R.IntVal = Src1.IntVal * Src2.IntVal; break; + case Instruction::FAdd: executeFAddInst(R, Src1, Src2, Ty); break; + case Instruction::FSub: executeFSubInst(R, Src1, Src2, Ty); break; + case Instruction::FMul: executeFMulInst(R, Src1, Src2, Ty); break; + case Instruction::FDiv: executeFDivInst(R, Src1, Src2, Ty); break; + case Instruction::FRem: executeFRemInst(R, Src1, Src2, Ty); break; case Instruction::UDiv: R.IntVal = Src1.IntVal.udiv(Src2.IntVal); break; case Instruction::SDiv: R.IntVal = Src1.IntVal.sdiv(Src2.IntVal); break; case Instruction::URem: R.IntVal = Src1.IntVal.urem(Src2.IntVal); break; @@ -1258,18 +1251,21 @@ GenericValue Interpreter::getConstantExprValue (ConstantExpr *CE, GenericValue Dest; const Type * Ty = CE->getOperand(0)->getType(); switch (CE->getOpcode()) { - case Instruction::Add: executeAddInst (Dest, Op0, Op1, Ty); break; - case Instruction::Sub: executeSubInst (Dest, Op0, Op1, Ty); break; - case Instruction::Mul: executeMulInst (Dest, Op0, Op1, Ty); break; + case Instruction::Add: Dest.IntVal = Op0.IntVal + Op1.IntVal; break; + case Instruction::Sub: Dest.IntVal = Op0.IntVal - Op1.IntVal; break; + case Instruction::Mul: Dest.IntVal = Op0.IntVal * Op1.IntVal; break; + case Instruction::FAdd: executeFAddInst(Dest, Op0, Op1, Ty); break; + case Instruction::FSub: executeFSubInst(Dest, Op0, Op1, Ty); break; + case Instruction::FMul: executeFMulInst(Dest, Op0, Op1, Ty); break; case Instruction::FDiv: executeFDivInst(Dest, Op0, Op1, Ty); break; case Instruction::FRem: executeFRemInst(Dest, Op0, Op1, Ty); break; case Instruction::SDiv: Dest.IntVal = Op0.IntVal.sdiv(Op1.IntVal); break; case Instruction::UDiv: Dest.IntVal = Op0.IntVal.udiv(Op1.IntVal); break; case Instruction::URem: Dest.IntVal = Op0.IntVal.urem(Op1.IntVal); break; case Instruction::SRem: Dest.IntVal = Op0.IntVal.srem(Op1.IntVal); break; - case Instruction::And: Dest.IntVal = Op0.IntVal.And(Op1.IntVal); break; - case Instruction::Or: Dest.IntVal = Op0.IntVal.Or(Op1.IntVal); break; - case Instruction::Xor: Dest.IntVal = Op0.IntVal.Xor(Op1.IntVal); break; + case Instruction::And: Dest.IntVal = Op0.IntVal & Op1.IntVal; break; + case Instruction::Or: Dest.IntVal = Op0.IntVal | Op1.IntVal; break; + case Instruction::Xor: Dest.IntVal = Op0.IntVal ^ Op1.IntVal; break; case Instruction::Shl: Dest.IntVal = Op0.IntVal.shl(Op1.IntVal.getZExtValue()); break; diff --git a/lib/ExecutionEngine/JIT/JITEmitter.cpp b/lib/ExecutionEngine/JIT/JITEmitter.cpp index d3b0820c5f..43f23e4434 100644 --- a/lib/ExecutionEngine/JIT/JITEmitter.cpp +++ b/lib/ExecutionEngine/JIT/JITEmitter.cpp @@ -891,8 +891,11 @@ unsigned JITEmitter::addSizeOfGlobalsInConstantVal(const Constant *C, break; } case Instruction::Add: + case Instruction::FAdd: case Instruction::Sub: + case Instruction::FSub: case Instruction::Mul: + case Instruction::FMul: case Instruction::UDiv: case Instruction::SDiv: case Instruction::URem: diff --git a/lib/Target/CBackend/CBackend.cpp b/lib/Target/CBackend/CBackend.cpp index 4d7b54503e..ed3ff8171f 100644 --- a/lib/Target/CBackend/CBackend.cpp +++ b/lib/Target/CBackend/CBackend.cpp @@ -1000,8 +1000,11 @@ void CWriter::printConstant(Constant *CPV, bool Static) { Out << ')'; return; case Instruction::Add: + case Instruction::FAdd: case Instruction::Sub: + case Instruction::FSub: case Instruction::Mul: + case Instruction::FMul: case Instruction::SDiv: case Instruction::UDiv: case Instruction::FDiv: @@ -1020,9 +1023,12 @@ void CWriter::printConstant(Constant *CPV, bool Static) { bool NeedsClosingParens = printConstExprCast(CE, Static); printConstantWithCast(CE->getOperand(0), CE->getOpcode()); switch (CE->getOpcode()) { - case Instruction::Add: Out << " + "; break; - case Instruction::Sub: Out << " - "; break; - case Instruction::Mul: Out << " * "; break; + case Instruction::Add: + case Instruction::FAdd: Out << " + "; break; + case Instruction::Sub: + case Instruction::FSub: Out << " - "; break; + case Instruction::Mul: + case Instruction::FMul: Out << " * "; break; case Instruction::URem: case Instruction::SRem: case Instruction::FRem: Out << " % "; break; @@ -1322,8 +1328,6 @@ bool CWriter::printConstExprCast(const ConstantExpr* CE, bool Static) { case Instruction::Mul: // We need to cast integer arithmetic so that it is always performed // as unsigned, to avoid undefined behavior on overflow. - if (!Ty->isIntOrIntVector()) break; - // FALL THROUGH case Instruction::LShr: case Instruction::URem: case Instruction::UDiv: NeedsExplicitCast = true; break; @@ -1387,8 +1391,6 @@ void CWriter::printConstantWithCast(Constant* CPV, unsigned Opcode) { case Instruction::Mul: // We need to cast integer arithmetic so that it is always performed // as unsigned, to avoid undefined behavior on overflow. - if (!OpTy->isIntOrIntVector()) break; - // FALL THROUGH case Instruction::LShr: case Instruction::UDiv: case Instruction::URem: @@ -1505,8 +1507,6 @@ bool CWriter::writeInstructionCast(const Instruction &I) { case Instruction::Mul: // We need to cast integer arithmetic so that it is always performed // as unsigned, to avoid undefined behavior on overflow. - if (!Ty->isIntOrIntVector()) break; - // FALL THROUGH case Instruction::LShr: case Instruction::URem: case Instruction::UDiv: @@ -1552,8 +1552,6 @@ void CWriter::writeOperandWithCast(Value* Operand, unsigned Opcode) { case Instruction::Mul: // We need to cast integer arithmetic so that it is always performed // as unsigned, to avoid undefined behavior on overflow. - if (!OpTy->isIntOrIntVector()) break; - // FALL THROUGH case Instruction::LShr: case Instruction::UDiv: case Instruction::URem: // Cast to unsigned first @@ -2602,10 +2600,14 @@ void CWriter::visitBinaryOperator(Instruction &I) { // If this is a negation operation, print it out as such. For FP, we don't // want to print "-0.0 - X". - if (BinaryOperator::isNeg(&I)) { + if (BinaryOperator::isNeg(&I) || BinaryOperator::isFNeg(&I)) { Out << "-("; writeOperand(BinaryOperator::getNegArgument(cast<BinaryOperator>(&I))); Out << ")"; + } else if (BinaryOperator::isFNeg(&I)) { + Out << "-("; + writeOperand(BinaryOperator::getFNegArgument(cast<BinaryOperator>(&I))); + Out << ")"; } else if (I.getOpcode() == Instruction::FRem) { // Output a call to fmod/fmodf instead of emitting a%b if (I.getType() == Type::FloatTy) @@ -2630,9 +2632,12 @@ void CWriter::visitBinaryOperator(Instruction &I) { writeOperandWithCast(I.getOperand(0), I.getOpcode()); switch (I.getOpcode()) { - case Instruction::Add: Out << " + "; break; - case Instruction::Sub: Out << " - "; break; - case Instruction::Mul: Out << " * "; break; + case Instruction::Add: + case Instruction::FAdd: Out << " + "; break; + case Instruction::Sub: + case Instruction::FSub: Out << " - "; break; + case Instruction::Mul: + case Instruction::FMul: Out << " * "; break; case Instruction::URem: case Instruction::SRem: case Instruction::FRem: Out << " % "; break; diff --git a/lib/Target/CppBackend/CPPBackend.cpp b/lib/Target/CppBackend/CPPBackend.cpp index 4082989c4c..04a6829d9c 100644 --- a/lib/Target/CppBackend/CPPBackend.cpp +++ b/lib/Target/CppBackend/CPPBackend.cpp @@ -865,8 +865,11 @@ namespace { Out << "Constant* " << constName << " = ConstantExpr::"; switch (CE->getOpcode()) { case Instruction::Add: Out << "getAdd("; break; + case Instruction::FAdd: Out << "getFAdd("; break; case Instruction::Sub: Out << "getSub("; break; + case Instruction::FSub: Out << "getFSub("; break; case Instruction::Mul: Out << "getMul("; break; + case Instruction::FMul: Out << "getFMul("; break; case Instruction::UDiv: Out << "getUDiv("; break; case Instruction::SDiv: Out << "getSDiv("; break; case Instruction::FDiv: Out << "getFDiv("; break; @@ -1159,8 +1162,11 @@ namespace { break; } case Instruction::Add: + case Instruction::FAdd: case Instruction::Sub: + case Instruction::FSub: case Instruction::Mul: + case Instruction::FMul: case Instruction::UDiv: case Instruction::SDiv: case Instruction::FDiv: @@ -1176,8 +1182,11 @@ namespace { Out << "BinaryOperator* " << iName << " = BinaryOperator::Create("; switch (I->getOpcode()) { case Instruction::Add: Out << "Instruction::Add"; break; + case Instruction::FAdd: Out << "Instruction::FAdd"; break; case Instruction::Sub: Out << "Instruction::Sub"; break; + case Instruction::FSub: Out << "Instruction::FSub"; break; case Instruction::Mul: Out << "Instruction::Mul"; break; + case Instruction::FMul: Out << "Instruction::FMul"; break; case Instruction::UDiv:Out << "Instruction::UDiv"; break; case Instruction::SDiv:Out << "Instruction::SDiv"; break; case Instruction::FDiv:Out << "Instruction::FDiv"; break; diff --git a/lib/Target/MSIL/MSILWriter.cpp b/lib/Target/MSIL/MSILWriter.cpp index ada851d4f2..37e5b1eccd 100644 --- a/lib/Target/MSIL/MSILWriter.cpp +++ b/lib/Target/MSIL/MSILWriter.cpp @@ -1060,12 +1060,15 @@ void MSILWriter::printInstruction(const Instruction* Inst) { break; // Binary case Instruction::Add: + case Instruction::FAdd: printBinaryInstruction("add",Left,Right); break; case Instruction::Sub: + case Instruction::FSub: printBinaryInstruction("sub",Left,Right); break; - case Instruction::Mul: + case Instruction::Mul: + case Instruction::FMul: printBinaryInstruction("mul",Left,Right); break; case Instruction::UDiv: @@ -1322,12 +1325,15 @@ void MSILWriter::printConstantExpr(const ConstantExpr* CE) { printSelectInstruction(CE->getOperand(0),CE->getOperand(1),CE->getOperand(2)); break; case Instruction::Add: + case Instruction::FAdd: printBinaryInstruction("add",left,right); break; case Instruction::Sub: + case Instruction::FSub: printBinaryInstruction("sub",left,right); break; case Instruction::Mul: + case Instruction::FMul: printBinaryInstruction("mul",left,right); break; case Instruction::UDiv: diff --git a/lib/Transforms/Scalar/GVN.cpp b/lib/Transforms/Scalar/GVN.cpp index 733dfa97a1..673d38b7f3 100644 --- a/lib/Transforms/Scalar/GVN.cpp +++ b/lib/Transforms/Scalar/GVN.cpp @@ -59,7 +59,8 @@ cl::opt<bool> EnableLoadPRE("enable-load-pre", cl::init(true)); /// two values. namespace { struct VISIBILITY_HIDDEN Expression { - enum ExpressionOpcode { ADD, SUB, MUL, UDIV, SDIV, FDIV, UREM, SREM, + enum ExpressionOpcode { ADD, FADD, SUB, FSUB, MUL, FMUL, + UDIV, SDIV, FDIV, UREM, SREM, FREM, SHL, LSHR, ASHR, AND, OR, XOR, ICMPEQ, ICMPNE, ICMPUGT, ICMPUGE, ICMPULT, ICMPULE, ICMPSGT, ICMPSGE, ICMPSLT, ICMPSLE, FCMPOEQ, @@ -200,8 +201,11 @@ Expression::ExpressionOpcode ValueTable::getOpcode(BinaryOperator* BO) { default: // THIS SHOULD NEVER HAPPEN assert(0 && "Binary operator with unknown opcode?"); case Instruction::Add: return Expression::ADD; + case Instruction::FAdd: return Expression::FADD; case Instruction::Sub: return Expression::SUB; + case Instruction::FSub: return Expression::FSUB; case Instruction::Mul: return Expression::MUL; + case Instruction::FMul: return Expression::FMUL; case Instruction::UDiv: return Expression::UDIV; case Instruction::SDiv: return Expression::SDIV; case Instruction::FDiv: return Expression::FDIV; diff --git a/lib/Transforms/Scalar/GVNPRE.cpp b/lib/Transforms/Scalar/GVNPRE.cpp index e3b09379a2..0f3153f2a7 100644 --- a/lib/Transforms/Scalar/GVNPRE.cpp +++ b/lib/Transforms/Scalar/GVNPRE.cpp @@ -55,7 +55,8 @@ namespace { /// two values. struct Expression { - enum ExpressionOpcode { ADD, SUB, MUL, UDIV, SDIV, FDIV, UREM, SREM, + enum ExpressionOpcode { ADD, FADD, SUB, FSUB, MUL, FMUL, + UDIV, SDIV, FDIV, UREM, SREM, FREM, SHL, LSHR, ASHR, AND, OR, XOR, ICMPEQ, ICMPNE, ICMPUGT, ICMPUGE, ICMPULT, ICMPULE, ICMPSGT, ICMPSGE, ICMPSLT, ICMPSLE, FCMPOEQ, @@ -202,10 +203,16 @@ Expression::ExpressionOpcode switch(BO->getOpcode()) { case Instruction::Add: return Expression::ADD; + case Instruction::FAdd: + return Expression::FADD; case Instruction::Sub: return Expression::SUB; + case Instruction::FSub: + return Expression::FSUB; case Instruction::Mul: return Expression::MUL; + case Instruction::FMul: + return Expression::FMUL; case Instruction::UDiv: return Expression::UDIV; |