Keep track of *which* input constraint matches an output

constraint.  Reject asms where an output has multiple
input constraints tied to it.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57687 91177308-0d34-0410-b5e6-96231b3b80d8

3 files changed, 13 insertions, 8 deletions

diff --git a/lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp b/lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp
index 64192dc41a..103b5c0e7e 100644
--- a/lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp
+++ b/lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp
@@ -4491,7 +4491,7 @@ GetRegistersForValue(SDISelAsmOperandInfo &OpInfo,
     
     // If there is an input constraint that matches this, we need to reserve 
     // the input register so no other inputs allocate to it.
-    isInReg = OpInfo.hasMatchingInput;
+    isInReg = OpInfo.hasMatchingInput();
     break;
   case InlineAsm::isInput:
     isInReg = true;
@@ -4562,7 +4562,7 @@ GetRegistersForValue(SDISelAsmOperandInfo &OpInfo,
     // the constraint, so we have to pick a register to pin the input/output to.
     // If it isn't a matched constraint, go ahead and create vreg and let the
     // regalloc do its thing.
-    if (!OpInfo.hasMatchingInput) {
+    if (!OpInfo.hasMatchingInput()) {
       RegVT = *PhysReg.second->vt_begin();
       if (OpInfo.ConstraintVT == MVT::Other)
         ValueVT = RegVT;
@@ -4863,7 +4863,7 @@ void SelectionDAGLowering::visitInlineAsm(CallSite CS) {
     case InlineAsm::isInput: {
       SDValue InOperandVal = OpInfo.CallOperand;
       
-      if (OpInfo.isMatchingConstraint()) {   // Matching constraint?
+      if (OpInfo.isMatchingInputConstraint()) {   // Matching constraint?
         // If this is required to match an output register we have already set,
         // just use its register.
         unsigned OperandNo = OpInfo.getMatchedOperand();
diff --git a/lib/CodeGen/SelectionDAG/TargetLowering.cpp b/lib/CodeGen/SelectionDAG/TargetLowering.cpp
index 664e06d2d2..479e1380c5 100644
--- a/lib/CodeGen/SelectionDAG/TargetLowering.cpp
+++ b/lib/CodeGen/SelectionDAG/TargetLowering.cpp
@@ -1962,9 +1962,9 @@ getRegForInlineAsmConstraint(const std::string &Constraint,
 //===----------------------------------------------------------------------===//
 // Constraint Selection.
 
-/// isMatchingConstraint - Return true of this is an input operand that is a
-/// matching constraint like "4".
-bool TargetLowering::AsmOperandInfo::isMatchingConstraint() const {
+/// isMatchingInputConstraint - Return true of this is an input operand that is
+/// a matching constraint like "4".
+bool TargetLowering::AsmOperandInfo::isMatchingInputConstraint() const {
   assert(!ConstraintCode.empty() && "No known constraint!");
   return isdigit(ConstraintCode[0]);
 }
diff --git a/lib/VMCore/InlineAsm.cpp b/lib/VMCore/InlineAsm.cpp
index 5eefc8842b..524e294ab7 100644
--- a/lib/VMCore/InlineAsm.cpp
+++ b/lib/VMCore/InlineAsm.cpp
@@ -57,7 +57,7 @@ bool InlineAsm::ConstraintInfo::Parse(const std::string &Str,
   // Initialize
   Type = isInput;
   isEarlyClobber = false;
-  hasMatchingInput = false;
+  MatchingInput = -1;
   isCommutative = false;
   isIndirect = false;
   
@@ -127,8 +127,13 @@ bool InlineAsm::ConstraintInfo::Parse(const std::string &Str,
           Type != isInput)
         return true;  // Invalid constraint number.
       
+      // If Operand N already has a matching input, reject this.  An output
+      // can't be constrained to the same value as multiple inputs.
+      if (ConstraintsSoFar[N].hasMatchingInput())
+        return true;
+      
       // Note that operand #n has a matching input.
-      ConstraintsSoFar[N].hasMatchingInput = true;
+      ConstraintsSoFar[N].MatchingInput = ConstraintsSoFar.size();
     } else {
       // Single letter constraint.
       Codes.push_back(std::string(I, I+1));