diff options
author | Craig Topper <craig.topper@gmail.com> | 2012-11-15 08:02:19 +0000 |
---|---|---|
committer | Craig Topper <craig.topper@gmail.com> | 2012-11-15 08:02:19 +0000 |
commit | 44e394cf618e67b74b0ca566c0acefbc3ca16a58 (patch) | |
tree | b36992020d6e13cd8f4ba3020e80a6b850ab1613 /lib | |
parent | f48ef5594f9bc14effa0928a5628b88286c0592a (diff) |
Make a bunch of floating point operations on vectors Expand so that instruction selection won't fail.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168028 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib')
-rw-r--r-- | lib/Target/PowerPC/PPCISelLowering.cpp | 16 |
1 files changed, 10 insertions, 6 deletions
diff --git a/lib/Target/PowerPC/PPCISelLowering.cpp b/lib/Target/PowerPC/PPCISelLowering.cpp index f7a7cfa890..d51baa6a57 100644 --- a/lib/Target/PowerPC/PPCISelLowering.cpp +++ b/lib/Target/PowerPC/PPCISelLowering.cpp @@ -347,6 +347,16 @@ PPCTargetLowering::PPCTargetLowering(PPCTargetMachine &TM) setOperationAction(ISD::UREM, VT, Expand); setOperationAction(ISD::FDIV, VT, Expand); setOperationAction(ISD::FNEG, VT, Expand); + setOperationAction(ISD::FSQRT, VT, Expand); + setOperationAction(ISD::FLOG, VT, Expand); + setOperationAction(ISD::FLOG10, VT, Expand); + setOperationAction(ISD::FLOG2, VT, Expand); + setOperationAction(ISD::FEXP, VT, Expand); + setOperationAction(ISD::FEXP2, VT, Expand); + setOperationAction(ISD::FSIN, VT, Expand); + setOperationAction(ISD::FCOS, VT, Expand); + setOperationAction(ISD::FABS, VT, Expand); + setOperationAction(ISD::FPOWI, VT, Expand); setOperationAction(ISD::FFLOOR, VT, Expand); setOperationAction(ISD::FCEIL, VT, Expand); setOperationAction(ISD::FTRUNC, VT, Expand); @@ -378,12 +388,6 @@ PPCTargetLowering::PPCTargetLowering(PPCTargetMachine &TM) setLoadExtAction(ISD::EXTLOAD, VT, Expand); } - for (unsigned i = (unsigned)MVT::FIRST_FP_VECTOR_VALUETYPE; - i <= (unsigned)MVT::LAST_FP_VECTOR_VALUETYPE; ++i) { - MVT::SimpleValueType VT = (MVT::SimpleValueType)i; - setOperationAction(ISD::FSQRT, VT, Expand); - } - // We can custom expand all VECTOR_SHUFFLEs to VPERM, others we can handle // with merges, splats, etc. setOperationAction(ISD::VECTOR_SHUFFLE, MVT::v16i8, Custom); |