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authorDevang Patel <dpatel@apple.com>2007-04-25 18:32:35 +0000
committerDevang Patel <dpatel@apple.com>2007-04-25 18:32:35 +0000
commit68c01b3cf35bb7ed2d3a3f63053e304e092bcfdd (patch)
tree6dd67d240cb102a74084e77da2859ac52e6a0279 /lib/Transforms/Scalar/ScalarReplAggregates.cpp
parentc0fabcbabeba0e002e40f9dc33a88af67c6ad429 (diff)
Mem2Reg does not need TargetData.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36444 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Transforms/Scalar/ScalarReplAggregates.cpp')
-rw-r--r--lib/Transforms/Scalar/ScalarReplAggregates.cpp3
1 files changed, 1 insertions, 2 deletions
diff --git a/lib/Transforms/Scalar/ScalarReplAggregates.cpp b/lib/Transforms/Scalar/ScalarReplAggregates.cpp
index 822b1786ce..71007d29fe 100644
--- a/lib/Transforms/Scalar/ScalarReplAggregates.cpp
+++ b/lib/Transforms/Scalar/ScalarReplAggregates.cpp
@@ -104,7 +104,6 @@ bool SROA::runOnFunction(Function &F) {
bool SROA::performPromotion(Function &F) {
std::vector<AllocaInst*> Allocas;
- const TargetData &TD = getAnalysis<TargetData>();
ETForest &ET = getAnalysis<ETForest>();
DominanceFrontier &DF = getAnalysis<DominanceFrontier>();
@@ -124,7 +123,7 @@ bool SROA::performPromotion(Function &F) {
if (Allocas.empty()) break;
- PromoteMemToReg(Allocas, ET, DF, TD);
+ PromoteMemToReg(Allocas, ET, DF);
NumPromoted += Allocas.size();
Changed = true;
}