diff options
author | Dan Gohman <gohman@apple.com> | 2008-08-13 23:12:35 +0000 |
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committer | Dan Gohman <gohman@apple.com> | 2008-08-13 23:12:35 +0000 |
commit | a60832b0187642d01fd726dc766cd62587f6add0 (patch) | |
tree | fa65f83dbdff0f7079cc1fe1f45241fbcb59e784 /lib/Transforms/Scalar/InstructionCombining.cpp | |
parent | 289983123ba4170c8a27e9638935818f8142bc89 (diff) |
Fix a bogus srem rule - a negative value srem'd by a power-of-2
can have a non-negative result; for example, -16%16 is 0. Also,
clarify the related comments. This fixes PR2670.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54767 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Transforms/Scalar/InstructionCombining.cpp')
-rw-r--r-- | lib/Transforms/Scalar/InstructionCombining.cpp | 3 |
1 files changed, 0 insertions, 3 deletions
diff --git a/lib/Transforms/Scalar/InstructionCombining.cpp b/lib/Transforms/Scalar/InstructionCombining.cpp index bdea6e40d2..74b88b9afc 100644 --- a/lib/Transforms/Scalar/InstructionCombining.cpp +++ b/lib/Transforms/Scalar/InstructionCombining.cpp @@ -1266,11 +1266,8 @@ bool InstCombiner::SimplifyDemandedBits(Value *V, APInt DemandedMask, if (LHSKnownZero[BitWidth-1] || ((LHSKnownZero & LowBits) == LowBits)) LHSKnownZero |= ~LowBits; - else if (LHSKnownOne[BitWidth-1]) - LHSKnownOne |= ~LowBits; KnownZero |= LHSKnownZero & DemandedMask; - KnownOne |= LHSKnownOne & DemandedMask; assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?"); } |