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| author | Bruno Cardoso Lopes <bruno.cardoso@gmail.com> | 2011-08-09 05:48:01 +0000 |
|---|---|---|
| committer | Bruno Cardoso Lopes <bruno.cardoso@gmail.com> | 2011-08-09 05:48:01 +0000 |
| commit | e321d7ffc5b06152efc4d6e8e1880e08f5c936a8 (patch) | |
| tree | 4c3972feaad38d98b8080f28c3ad6c1c880b440c /lib/Target | |
| parent | f5b757642d8c51c559c17532d193a13d1f2e3cc0 (diff) | |
Handle sitofp between v4f64 <- v4i32. Fix PR10559
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137114 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target')
| -rw-r--r-- | lib/Target/X86/X86ISelLowering.cpp | 22 |
1 files changed, 21 insertions, 1 deletions
diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp index 71b23e2ccb..b8197edb2b 100644 --- a/lib/Target/X86/X86ISelLowering.cpp +++ b/lib/Target/X86/X86ISelLowering.cpp @@ -969,6 +969,9 @@ X86TargetLowering::X86TargetLowering(X86TargetMachine &TM) setOperationAction(ISD::SINT_TO_FP, MVT::v8i32, Legal); setOperationAction(ISD::FP_ROUND, MVT::v4f32, Legal); + // sint_to_fp between different vector types needs custom handling + setOperationAction(ISD::SINT_TO_FP, MVT::v4i32, Custom); + setOperationAction(ISD::CONCAT_VECTORS, MVT::v4f64, Custom); setOperationAction(ISD::CONCAT_VECTORS, MVT::v4i64, Custom); setOperationAction(ISD::CONCAT_VECTORS, MVT::v8f32, Custom); @@ -7078,6 +7081,24 @@ SDValue X86TargetLowering::LowerShiftParts(SDValue Op, SelectionDAG &DAG) const SDValue X86TargetLowering::LowerSINT_TO_FP(SDValue Op, SelectionDAG &DAG) const { EVT SrcVT = Op.getOperand(0).getValueType(); + EVT DstVT = Op.getValueType(); + DebugLoc dl = Op.getDebugLoc(); + + if (SrcVT.isVector() && DstVT.isVector()) { + unsigned SrcVTSize = SrcVT.getSizeInBits(); + unsigned DstVTSize = DstVT.getSizeInBits(); + + // Support directly by the target + if (SrcVTSize == DstVTSize) + return Op; + + // Handle v4f64 = sitofp v4i32 + if (DstVT != MVT::v4f64 && SrcVT != MVT::v4i32) + return SDValue(); + + SDValue V = DAG.getNode(ISD::SINT_TO_FP, dl, MVT::v4f32, Op.getOperand(0)); + return DAG.getNode(ISD::FP_EXTEND, dl, DstVT, V); + } if (SrcVT.isVector()) return SDValue(); @@ -7094,7 +7115,6 @@ SDValue X86TargetLowering::LowerSINT_TO_FP(SDValue Op, return Op; } - DebugLoc dl = Op.getDebugLoc(); unsigned Size = SrcVT.getSizeInBits()/8; MachineFunction &MF = DAG.getMachineFunction(); int SSFI = MF.getFrameInfo()->CreateStackObject(Size, Size, false); |