diff options
| author | Lang Hames <lhames@gmail.com> | 2012-02-17 00:27:16 +0000 |
|---|---|---|
| committer | Lang Hames <lhames@gmail.com> | 2012-02-17 00:27:16 +0000 |
| commit | c2e08db4e5a8e1b3c253fb07c6eb736dfb66fe59 (patch) | |
| tree | 1dfa9e9067a1530c776e314b56ea664d734edb28 /lib/Target | |
| parent | af8b34dae90fd6d146a3b4a83b50751ed21f07c8 (diff) | |
Re-enable 150652 and 150654 - Make FPSCR non-reserved, and make MachineCSE bail on reserved registers. This *should* be safe as of r150786.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150769 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target')
| -rw-r--r-- | lib/Target/ARM/ARMBaseRegisterInfo.cpp | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/lib/Target/ARM/ARMBaseRegisterInfo.cpp b/lib/Target/ARM/ARMBaseRegisterInfo.cpp index 6a46e63626..9c8486c9bc 100644 --- a/lib/Target/ARM/ARMBaseRegisterInfo.cpp +++ b/lib/Target/ARM/ARMBaseRegisterInfo.cpp @@ -79,7 +79,6 @@ getReservedRegs(const MachineFunction &MF) const { BitVector Reserved(getNumRegs()); Reserved.set(ARM::SP); Reserved.set(ARM::PC); - Reserved.set(ARM::FPSCR); if (TFI->hasFP(MF)) Reserved.set(FramePtr); if (hasBasePointer(MF)) |