diff options
| author | Chris Lattner <sabre@nondot.org> | 2010-04-17 07:38:24 +0000 |
|---|---|---|
| committer | Chris Lattner <sabre@nondot.org> | 2010-04-17 07:38:24 +0000 |
| commit | 65de1b9eb373e196681bfc32f49c40f0d0561522 (patch) | |
| tree | 21b1c90bd32e0b970e178c58ff644b6252116e3c /lib/Target | |
| parent | ca5e4f8e19f32c9ee6e93bc05c37095fb4cedb26 (diff) | |
a bunch of ssse3 instructions are misencoded to think they have an
i8 field when they really do not. This fixes rdar://7840289
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101629 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target')
| -rw-r--r-- | lib/Target/X86/X86InstrSSE.td | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/lib/Target/X86/X86InstrSSE.td b/lib/Target/X86/X86InstrSSE.td index ffe2a884b9..a9bc5fdbd3 100644 --- a/lib/Target/X86/X86InstrSSE.td +++ b/lib/Target/X86/X86InstrSSE.td @@ -2878,6 +2878,7 @@ let Constraints = "$src1 = $dst" in { } } +let ImmT = NoImm in { // None of these have i8 immediate fields. defm PHADDW : SS3I_binop_rm_int_16<0x01, "phaddw", int_x86_ssse3_phadd_w, int_x86_ssse3_phadd_w_128>; @@ -2902,6 +2903,7 @@ defm PMADDUBSW : SS3I_binop_rm_int_8 <0x04, "pmaddubsw", defm PMULHRSW : SS3I_binop_rm_int_16<0x0B, "pmulhrsw", int_x86_ssse3_pmul_hr_sw, int_x86_ssse3_pmul_hr_sw_128, 1>; + defm PSHUFB : SS3I_binop_rm_int_8 <0x00, "pshufb", int_x86_ssse3_pshuf_b, int_x86_ssse3_pshuf_b_128>; @@ -2914,6 +2916,7 @@ defm PSIGNW : SS3I_binop_rm_int_16<0x09, "psignw", defm PSIGND : SS3I_binop_rm_int_32<0x0A, "psignd", int_x86_ssse3_psign_d, int_x86_ssse3_psign_d_128>; +} // palignr patterns. let Constraints = "$src1 = $dst" in { |