diff options
author | Derek Schuff <dschuff@chromium.org> | 2012-10-25 11:26:14 -0700 |
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committer | Derek Schuff <dschuff@chromium.org> | 2012-10-25 11:26:14 -0700 |
commit | 5c897cf45a7b9df227e0c562c27454f56ba86c20 (patch) | |
tree | ae3a9ea4d11bfb20379639dd9ca0951ce411e73a /lib/Target/XCore/XCoreISelLowering.cpp | |
parent | 89758b0545198f9a3876f0deb747146cbd84ce61 (diff) | |
parent | a8a0a155de16830b8fcab539ba2ec21de3145532 (diff) |
Merge commit 'a8a0a155de16830b8fcab539ba2ec21de3145532'
Conflicts:
lib/Target/X86/X86FrameLowering.cpp
lib/Target/X86/X86ISelLowering.cpp
The Intel folks switched some of the FrameLowering code to use
X86RegisterInfo::getSlotSize isntead of pointer size, thus reducing
our localmods in that file.
Diffstat (limited to 'lib/Target/XCore/XCoreISelLowering.cpp')
-rw-r--r-- | lib/Target/XCore/XCoreISelLowering.cpp | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/lib/Target/XCore/XCoreISelLowering.cpp b/lib/Target/XCore/XCoreISelLowering.cpp index 9e7816e21f..eaa745ba9b 100644 --- a/lib/Target/XCore/XCoreISelLowering.cpp +++ b/lib/Target/XCore/XCoreISelLowering.cpp @@ -477,7 +477,8 @@ LowerLOAD(SDValue Op, SelectionDAG &DAG) const { } // Lower to a call to __misaligned_load(BasePtr). - Type *IntPtrTy = getDataLayout()->getIntPtrType(*DAG.getContext()); + unsigned AS = LD->getAddressSpace(); + Type *IntPtrTy = getDataLayout()->getIntPtrType(*DAG.getContext(), AS); TargetLowering::ArgListTy Args; TargetLowering::ArgListEntry Entry; @@ -536,7 +537,8 @@ LowerSTORE(SDValue Op, SelectionDAG &DAG) const } // Lower to a call to __misaligned_store(BasePtr, Value). - Type *IntPtrTy = getDataLayout()->getIntPtrType(*DAG.getContext()); + unsigned AS = ST->getAddressSpace(); + Type *IntPtrTy = getDataLayout()->getIntPtrType(*DAG.getContext(), AS); TargetLowering::ArgListTy Args; TargetLowering::ArgListEntry Entry; |