diff options
author | Richard Osborne <richard@xmos.com> | 2013-05-05 13:20:22 +0000 |
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committer | Richard Osborne <richard@xmos.com> | 2013-05-05 13:20:22 +0000 |
commit | 1114b0ec15aaa22dfc0ce582820cea556600d103 (patch) | |
tree | 99df3ebec38ad0ff153774440d9163f184fd1c56 /lib/Target/XCore/Disassembler/XCoreDisassembler.cpp | |
parent | e210df20d3b69beaa3e83a6088b6bafb9f00bcfe (diff) |
[XCore] Remove '-' from back branch asm syntax.
Instead operands are treated as negative immediates
where the sign bit is implicit in the instruction
encoding.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181151 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/XCore/Disassembler/XCoreDisassembler.cpp')
-rw-r--r-- | lib/Target/XCore/Disassembler/XCoreDisassembler.cpp | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/lib/Target/XCore/Disassembler/XCoreDisassembler.cpp b/lib/Target/XCore/Disassembler/XCoreDisassembler.cpp index 7282f2f1e5..a2ae40c58a 100644 --- a/lib/Target/XCore/Disassembler/XCoreDisassembler.cpp +++ b/lib/Target/XCore/Disassembler/XCoreDisassembler.cpp @@ -97,6 +97,9 @@ static DecodeStatus DecodeRRegsRegisterClass(MCInst &Inst, static DecodeStatus DecodeBitpOperand(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder); +static DecodeStatus DecodeNegImmOperand(MCInst &Inst, unsigned Val, + uint64_t Address, const void *Decoder); + static DecodeStatus Decode2RInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, @@ -239,6 +242,12 @@ static DecodeStatus DecodeBitpOperand(MCInst &Inst, unsigned Val, return MCDisassembler::Success; } +static DecodeStatus DecodeNegImmOperand(MCInst &Inst, unsigned Val, + uint64_t Address, const void *Decoder) { + Inst.addOperand(MCOperand::CreateImm(-(int64_t)Val)); + return MCDisassembler::Success; +} + static DecodeStatus Decode2OpInstruction(unsigned Insn, unsigned &Op1, unsigned &Op2) { unsigned Combined = fieldFromInstruction(Insn, 6, 5); |