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| author | Chris Lattner <sabre@nondot.org> | 2005-01-10 20:55:48 +0000 |
|---|---|---|
| committer | Chris Lattner <sabre@nondot.org> | 2005-01-10 20:55:48 +0000 |
| commit | a13d3236d1354fb0faef3c9764163d81fce40767 (patch) | |
| tree | 2e5abdc3091e3fdcf86c8e5c0d7e17544e8d6806 /lib/Target/X86/X86ISelPattern.cpp | |
| parent | 281a601198f55be89914e64dca0801ba94f925ef (diff) | |
Implement 8-bit multiply for X86.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19435 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/X86/X86ISelPattern.cpp')
| -rw-r--r-- | lib/Target/X86/X86ISelPattern.cpp | 7 |
1 files changed, 6 insertions, 1 deletions
diff --git a/lib/Target/X86/X86ISelPattern.cpp b/lib/Target/X86/X86ISelPattern.cpp index 265e38815b..4c093fba3b 100644 --- a/lib/Target/X86/X86ISelPattern.cpp +++ b/lib/Target/X86/X86ISelPattern.cpp @@ -1213,7 +1213,12 @@ unsigned ISel::SelectExpr(SDOperand N) { Tmp2 = SelectExpr(N.getOperand(1)); switch (N.getValueType()) { default: assert(0 && "Cannot add this type!"); - case MVT::i8: assert(0 && "FIXME: MUL i8 not implemented yet!"); + case MVT::i8: + // Must use the MUL instruction, which forces use of AL. + BuildMI(BB, X86::MOV8rr, 1, X86::AL).addReg(Tmp1); + BuildMI(BB, X86::MUL8r, 1).addReg(Tmp2); + BuildMI(BB, X86::MOV8rr, 1, Result).addReg(X86::AL); + return Result; case MVT::i16: Opc = X86::IMUL16rr; break; case MVT::i32: Opc = X86::IMUL32rr; break; case MVT::f32: |