Updates to match change of getRegForInlineAsmConstraint prototype

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26305 91177308-0d34-0410-b5e6-96231b3b80d8

1 files changed, 3 insertions, 2 deletions

diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp
index 7c84850683..bbf590b8ac 100644
--- a/lib/Target/X86/X86ISelLowering.cpp
+++ b/lib/Target/X86/X86ISelLowering.cpp
@@ -1961,7 +1961,8 @@ void X86TargetLowering::computeMaskedBitsForTargetNode(const SDOperand Op,
 }
 
 std::vector<unsigned> X86TargetLowering::
-getRegForInlineAsmConstraint(const std::string &Constraint) const {
+getRegForInlineAsmConstraint(const std::string &Constraint,
+                             MVT::ValueType VT) const {
   if (Constraint.size() == 1) {
     // FIXME: not handling fp-stack yet!
     // FIXME: not handling MMX registers yet ('y' constraint).
@@ -1993,5 +1994,5 @@ getRegForInlineAsmConstraint(const std::string &Constraint) const {
   }
   
   // Handle explicit register names.
-  return TargetLowering::getRegForInlineAsmConstraint(Constraint);
+  return TargetLowering::getRegForInlineAsmConstraint(Constraint, VT);
 }