diff options
author | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2011-01-13 21:28:52 +0000 |
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committer | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2011-01-13 21:28:52 +0000 |
commit | 4f28c1c71450c711e96aa283de53739d8b4504cd (patch) | |
tree | 1dd3ac5b610ce2895b7a83a8f97a247f471e3f3a /lib/Target/X86/X86FrameLowering.cpp | |
parent | 422578547e0e3464af7ae23305c54dd71a8bd9e9 (diff) |
Teach frame lowering to ignore debug values after the terminators.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123399 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/X86/X86FrameLowering.cpp')
-rw-r--r-- | lib/Target/X86/X86FrameLowering.cpp | 11 |
1 files changed, 6 insertions, 5 deletions
diff --git a/lib/Target/X86/X86FrameLowering.cpp b/lib/Target/X86/X86FrameLowering.cpp index 7c7b4f3f8a..02010f87e4 100644 --- a/lib/Target/X86/X86FrameLowering.cpp +++ b/lib/Target/X86/X86FrameLowering.cpp @@ -646,7 +646,8 @@ void X86FrameLowering::emitEpilogue(MachineFunction &MF, X86MachineFunctionInfo *X86FI = MF.getInfo<X86MachineFunctionInfo>(); const X86RegisterInfo *RegInfo = TM.getRegisterInfo(); const X86InstrInfo &TII = *TM.getInstrInfo(); - MachineBasicBlock::iterator MBBI = prior(MBB.end()); + MachineBasicBlock::iterator MBBI = MBB.getLastNonDebugInstr(); + assert(MBBI != MBB.end() && "Returning block has no instructions"); unsigned RetOpcode = MBBI->getOpcode(); DebugLoc DL = MBBI->getDebugLoc(); bool Is64Bit = STI.is64Bit(); @@ -709,7 +710,7 @@ void X86FrameLowering::emitEpilogue(MachineFunction &MF, MachineBasicBlock::iterator PI = prior(MBBI); unsigned Opc = PI->getOpcode(); - if (Opc != X86::POP32r && Opc != X86::POP64r && + if (Opc != X86::POP32r && Opc != X86::POP64r && Opc != X86::DBG_VALUE && !PI->getDesc().isTerminator()) break; @@ -756,7 +757,7 @@ void X86FrameLowering::emitEpilogue(MachineFunction &MF, // We're returning from function via eh_return. if (RetOpcode == X86::EH_RETURN || RetOpcode == X86::EH_RETURN64) { - MBBI = prior(MBB.end()); + MBBI = MBB.getLastNonDebugInstr(); MachineOperand &DestAddr = MBBI->getOperand(0); assert(DestAddr.isReg() && "Offset should be in register!"); BuildMI(MBB, MBBI, DL, @@ -768,7 +769,7 @@ void X86FrameLowering::emitEpilogue(MachineFunction &MF, RetOpcode == X86::TCRETURNmi64) { bool isMem = RetOpcode == X86::TCRETURNmi || RetOpcode == X86::TCRETURNmi64; // Tail call return: adjust the stack pointer and jump to callee. - MBBI = prior(MBB.end()); + MBBI = MBB.getFirstTerminator(); MachineOperand &JumpTarget = MBBI->getOperand(0); MachineOperand &StackAdjust = MBBI->getOperand(isMem ? 5 : 1); assert(StackAdjust.isImm() && "Expecting immediate value."); @@ -826,7 +827,7 @@ void X86FrameLowering::emitEpilogue(MachineFunction &MF, (X86FI->getTCReturnAddrDelta() < 0)) { // Add the return addr area delta back since we are not tail calling. int delta = -1*X86FI->getTCReturnAddrDelta(); - MBBI = prior(MBB.end()); + MBBI = MBB.getLastNonDebugInstr(); // Check for possible merge with preceeding ADD instruction. delta += mergeSPUpdates(MBB, MBBI, StackPtr, true); |