Add a floating point killer pass. This pass runs before register

allocaton on the X86 to add information to the machine code denoting
that our floating point stackifier cannot handle virtual point
register that are alive across basic blocks. This pass adds an
implicit def of all virtual floating point register at the end of each
basic block.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@10446 91177308-0d34-0410-b5e6-96231b3b80d8

1 files changed, 52 insertions, 0 deletions

diff --git a/lib/Target/X86/X86FloatingPoint.cpp b/lib/Target/X86/X86FloatingPoint.cpp
index 5c6e6ebfdd..b6bae6dffa 100644
--- a/lib/Target/X86/X86FloatingPoint.cpp
+++ b/lib/Target/X86/X86FloatingPoint.cpp
@@ -18,6 +18,7 @@
 #include "llvm/CodeGen/MachineFunctionPass.h"
 #include "llvm/CodeGen/MachineInstrBuilder.h"
 #include "llvm/CodeGen/LiveVariables.h"
+#include "llvm/CodeGen/Passes.h"
 #include "llvm/Target/TargetInstrInfo.h"
 #include "llvm/Target/TargetMachine.h"
 #include "Support/Debug.h"
@@ -601,4 +602,55 @@ void FPS::handleSpecialFP(MachineBasicBlock::iterator &I) {
   I = MBB->erase(I)-1;  // Remove the pseudo instruction
 }
 
+namespace {
+
+  struct FPK : public MachineFunctionPass {
+    virtual const char *getPassName() const { return "X86 FP Killer"; }
+    virtual bool runOnMachineFunction(MachineFunction &MF);
+      virtual void getAnalysisUsage(AnalysisUsage &AU) const {
+          AU.setPreservesAll();
+          AU.addRequired<LiveVariables>();
+          AU.addRequiredID(PHIEliminationID);
+          MachineFunctionPass::getAnalysisUsage(AU);
+      }
+  };
+}
+
+FunctionPass * createX86FloatingPointKillerPass() { return new FPK(); }
+
+bool FPK::runOnMachineFunction(MachineFunction &MF)
+{
+  const TargetInstrInfo& tii = MF.getTarget().getInstrInfo();;
+
+  for (MachineFunction::iterator
+           mbbi = MF.begin(), mbbe = MF.end(); mbbi != mbbe; ++mbbi) {
+    MachineBasicBlock& mbb = *mbbi;
+    MachineBasicBlock::reverse_iterator mii = mbb.rbegin();
+    // rewind to the last non terminating instruction
+    while (mii != mbb.rend() && tii.isTerminatorInstr((*mii)->getOpcode())) {
+      ++mii;
+    }
+    // add implicit def for all virtual floating point registers so that
+    // they are spilled at the end of each basic block, since our
+    // register stackifier doesn't handle them otherwise.
+    MachineInstr* instr = BuildMI(X86::IMPLICIT_DEF, 7)
+        .addReg(X86::FP6, MOTy::Def)
+        .addReg(X86::FP5, MOTy::Def)
+        .addReg(X86::FP4, MOTy::Def)
+        .addReg(X86::FP3, MOTy::Def)
+        .addReg(X86::FP2, MOTy::Def)
+        .addReg(X86::FP1, MOTy::Def)
+        .addReg(X86::FP0, MOTy::Def);
+        
+    mbb.insert(mii.base(), instr);
+    LiveVariables& lv = getAnalysis<LiveVariables>();
+    for (unsigned i = 0; i < instr->getNumOperands(); ++i) {
+        lv.HandlePhysRegDef(instr->getOperand(i).getAllocatedRegNum(), instr);
+        // force live variables to compute that these registers are dead
+        lv.HandlePhysRegDef(instr->getOperand(i).getAllocatedRegNum(), 0);
+    }
+  }
+  return true;
+}
+
 } // End llvm namespace