diff options
author | Brian Gaeke <gaeke@uiuc.edu> | 2004-05-14 06:54:56 +0000 |
---|---|---|
committer | Brian Gaeke <gaeke@uiuc.edu> | 2004-05-14 06:54:56 +0000 |
commit | 9f088e481cc636e9e105dc6b98b7593ca43e2fcf (patch) | |
tree | af3bfab7c869d056fba06d95dbb85cdd76befda3 /lib/Target/X86/InstSelectSimple.cpp | |
parent | fa28bb46017920ef2d123dcb979c47efb1b021b5 (diff) |
Generate branch machine instructions with MachineBasicBlock operands instead of
LLVM BasicBlock operands.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@13566 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/X86/InstSelectSimple.cpp')
-rw-r--r-- | lib/Target/X86/InstSelectSimple.cpp | 16 |
1 files changed, 9 insertions, 7 deletions
diff --git a/lib/Target/X86/InstSelectSimple.cpp b/lib/Target/X86/InstSelectSimple.cpp index e0e641e1ac..f9d5387532 100644 --- a/lib/Target/X86/InstSelectSimple.cpp +++ b/lib/Target/X86/InstSelectSimple.cpp @@ -1379,7 +1379,7 @@ void ISel::visitBranchInst(BranchInst &BI) { if (!BI.isConditional()) { // Unconditional branch? if (BI.getSuccessor(0) != NextBB) - BuildMI(BB, X86::JMP, 1).addPCDisp(BI.getSuccessor(0)); + BuildMI(BB, X86::JMP, 1).addMBB(MBBMap[BI.getSuccessor(0)]); return; } @@ -1392,12 +1392,12 @@ void ISel::visitBranchInst(BranchInst &BI) { BuildMI(BB, X86::TEST8rr, 2).addReg(condReg).addReg(condReg); if (BI.getSuccessor(1) == NextBB) { if (BI.getSuccessor(0) != NextBB) - BuildMI(BB, X86::JNE, 1).addPCDisp(BI.getSuccessor(0)); + BuildMI(BB, X86::JNE, 1).addMBB(MBBMap[BI.getSuccessor(0)]); } else { - BuildMI(BB, X86::JE, 1).addPCDisp(BI.getSuccessor(1)); + BuildMI(BB, X86::JE, 1).addMBB(MBBMap[BI.getSuccessor(1)]); if (BI.getSuccessor(0) != NextBB) - BuildMI(BB, X86::JMP, 1).addPCDisp(BI.getSuccessor(0)); + BuildMI(BB, X86::JMP, 1).addMBB(MBBMap[BI.getSuccessor(0)]); } return; } @@ -1429,14 +1429,16 @@ void ISel::visitBranchInst(BranchInst &BI) { }; if (BI.getSuccessor(0) != NextBB) { - BuildMI(BB, OpcodeTab[isSigned][OpNum], 1).addPCDisp(BI.getSuccessor(0)); + BuildMI(BB, OpcodeTab[isSigned][OpNum], 1) + .addMBB(MBBMap[BI.getSuccessor(0)]); if (BI.getSuccessor(1) != NextBB) - BuildMI(BB, X86::JMP, 1).addPCDisp(BI.getSuccessor(1)); + BuildMI(BB, X86::JMP, 1).addMBB(MBBMap[BI.getSuccessor(1)]); } else { // Change to the inverse condition... if (BI.getSuccessor(1) != NextBB) { OpNum ^= 1; - BuildMI(BB, OpcodeTab[isSigned][OpNum], 1).addPCDisp(BI.getSuccessor(1)); + BuildMI(BB, OpcodeTab[isSigned][OpNum], 1) + .addMBB(MBBMap[BI.getSuccessor(1)]); } } } |