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| author | Chris Lattner <sabre@nondot.org> | 2003-08-05 00:48:47 +0000 |
|---|---|---|
| committer | Chris Lattner <sabre@nondot.org> | 2003-08-05 00:48:47 +0000 |
| commit | 02beda12214997e2ac9586781e1f8d377744e6fa (patch) | |
| tree | f2441dcc6147f62f2bea202b47cb748e059861f8 /lib/Target/X86/InstSelectSimple.cpp | |
| parent | b10cea86a985d05786c60e6be641a93582ae6c29 (diff) | |
This is the real fix for the previous register allocator problem.
Physical registers should not float around.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7587 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/X86/InstSelectSimple.cpp')
| -rw-r--r-- | lib/Target/X86/InstSelectSimple.cpp | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/lib/Target/X86/InstSelectSimple.cpp b/lib/Target/X86/InstSelectSimple.cpp index 24c841d288..d66f7c225e 100644 --- a/lib/Target/X86/InstSelectSimple.cpp +++ b/lib/Target/X86/InstSelectSimple.cpp @@ -646,6 +646,8 @@ bool ISel::EmitComparisonGetSignedness(unsigned OpNum, Value *Op0, Value *Op1) { BuildMI(BB, SetCCOpcodeTab[0][OpNum], 0, X86::AL); BuildMI(BB, X86::CMPrr32, 2).addReg(Op0r+1).addReg(Op1r+1); BuildMI(BB, SetCCOpcodeTab[isSigned][OpNum], 0, X86::BL); + BuildMI(BB, X86::IMPLICIT_DEF, 0, X86::BH); + BuildMI(BB, X86::IMPLICIT_DEF, 0, X86::AH); BuildMI(BB, X86::CMOVErr16, 2, X86::BX).addReg(X86::BX).addReg(X86::AX); // NOTE: visitSetCondInst knows that the value is dumped into the BL // register at this point for long values... |