diff options
| author | Anton Korobeynikov <asl@math.spbu.ru> | 2009-07-18 13:33:17 +0000 |
|---|---|---|
| committer | Anton Korobeynikov <asl@math.spbu.ru> | 2009-07-18 13:33:17 +0000 |
| commit | 31e874490a259a19c31c4dad9ee3365ea2c0cd8f (patch) | |
| tree | 583b4fe2b09be784dae89f55fa4d65a49fc11c41 /lib/Target/SystemZ/SystemZInstrInfo.cpp | |
| parent | 87e412b92189a87f2850688ebd77d275fd579980 (diff) | |
Turn few asserts into errors / unreachable's
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76313 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/SystemZ/SystemZInstrInfo.cpp')
| -rw-r--r-- | lib/Target/SystemZ/SystemZInstrInfo.cpp | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/lib/Target/SystemZ/SystemZInstrInfo.cpp b/lib/Target/SystemZ/SystemZInstrInfo.cpp index 27bd47dc08..b7dfab5ea3 100644 --- a/lib/Target/SystemZ/SystemZInstrInfo.cpp +++ b/lib/Target/SystemZ/SystemZInstrInfo.cpp @@ -81,7 +81,7 @@ void SystemZInstrInfo::storeRegToStackSlot(MachineBasicBlock &MBB, } else if (RC == &SystemZ::GR128RegClass) { Opc = SystemZ::MOV128mr; } else - assert(0 && "Unsupported regclass to store"); + llvm_unreachable("Unsupported regclass to store"); addFrameReference(BuildMI(MBB, MI, DL, get(Opc)), FrameIdx) .addReg(SrcReg, getKillRegState(isKill)); @@ -110,7 +110,7 @@ void SystemZInstrInfo::loadRegFromStackSlot(MachineBasicBlock &MBB, } else if (RC == &SystemZ::GR128RegClass) { Opc = SystemZ::MOV128rm; } else - assert(0 && "Unsupported regclass to load"); + llvm_unreachable("Unsupported regclass to load"); addFrameReference(BuildMI(MBB, MI, DL, get(Opc), DestReg), FrameIdx); } @@ -584,7 +584,7 @@ const TargetInstrDesc& SystemZInstrInfo::getBrCond(SystemZCC::CondCodes CC) const { switch (CC) { default: - assert(0 && "Unknown condition code!"); + llvm_unreachable("Unknown condition code!"); case SystemZCC::O: return get(SystemZ::JO); case SystemZCC::H: return get(SystemZ::JH); case SystemZCC::NLE: return get(SystemZ::JNLE); @@ -627,7 +627,7 @@ SystemZCC::CondCodes SystemZInstrInfo::getOppositeCondition(SystemZCC::CondCodes CC) const { switch (CC) { default: - assert(0 && "Invalid condition!"); + llvm_unreachable("Invalid condition!"); case SystemZCC::O: return SystemZCC::NO; case SystemZCC::H: return SystemZCC::NH; case SystemZCC::NLE: return SystemZCC::LE; @@ -649,7 +649,7 @@ const TargetInstrDesc& SystemZInstrInfo::getLongDispOpc(unsigned Opc) const { switch (Opc) { default: - assert(0 && "Don't have long disp version of this instruction"); + llvm_unreachable("Don't have long disp version of this instruction"); case SystemZ::MOV32mr: return get(SystemZ::MOV32mry); case SystemZ::MOV32rm: return get(SystemZ::MOV32rmy); case SystemZ::MOVSX32rm16: return get(SystemZ::MOVSX32rm16y); |