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authorChris Lattner <sabre@nondot.org>2005-08-15 23:47:04 +0000
committerChris Lattner <sabre@nondot.org>2005-08-15 23:47:04 +0000
commitb0096bd19d6d519c8cc60c69c2658af6f1a2dbfd (patch)
tree4df306e4ca6ec25ae6576424b4d1b2d69bc98eb8 /lib/Target/PowerPC/PPCTargetMachine.cpp
parentdb25de496c1bd9047acc9f6ab825a92a7b5dd497 (diff)
Turn loop strength reduction on by default.
Only run createLowerConstantExpressionsPass for the simple isel. The DAG isel has no need for it. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22794 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/PowerPC/PPCTargetMachine.cpp')
-rw-r--r--lib/Target/PowerPC/PPCTargetMachine.cpp34
1 files changed, 14 insertions, 20 deletions
diff --git a/lib/Target/PowerPC/PPCTargetMachine.cpp b/lib/Target/PowerPC/PPCTargetMachine.cpp
index cc530a6ea9..e1f29ba519 100644
--- a/lib/Target/PowerPC/PPCTargetMachine.cpp
+++ b/lib/Target/PowerPC/PPCTargetMachine.cpp
@@ -7,6 +7,7 @@
//
//===----------------------------------------------------------------------===//
//
+// Top-level implementation for the PowerPC target.
//
//===----------------------------------------------------------------------===//
@@ -28,9 +29,6 @@
#include <iostream>
using namespace llvm;
-static cl::opt<bool> EnablePPCLSR("enable-lsr-for-ppc", cl::Hidden,
- cl::desc("Enable LSR for PPC (beta)"));
-
namespace {
const std::string PPC32ID = "PowerPC/32bit";
@@ -67,11 +65,9 @@ bool PowerPCTargetMachine::addPassesToEmitFile(PassManager &PM,
CodeGenFileType FileType) {
if (FileType != TargetMachine::AssemblyFile) return true;
- if (EnablePPCLSR) {
- PM.add(createLoopStrengthReducePass());
- PM.add(createVerifierPass());
- PM.add(createCFGSimplificationPass());
- }
+ // Run loop strength reduction before anything else.
+ PM.add(createLoopStrengthReducePass());
+ PM.add(createCFGSimplificationPass());
// FIXME: Implement efficient support for garbage collection intrinsics.
PM.add(createLowerGCPass());
@@ -82,15 +78,14 @@ bool PowerPCTargetMachine::addPassesToEmitFile(PassManager &PM,
// FIXME: Implement the switch instruction in the instruction selector!
PM.add(createLowerSwitchPass());
- PM.add(createLowerConstantExpressionsPass());
-
// Make sure that no unreachable blocks are instruction selected.
PM.add(createUnreachableBlockEliminationPass());
// Default to pattern ISel
- if (PatternISelTriState == 0)
+ if (PatternISelTriState == 0) {
+ PM.add(createLowerConstantExpressionsPass());
PM.add(createPPC32ISelSimple(*this));
- else
+ } else
PM.add(createPPC32ISelPattern(*this));
if (PrintMachineCode)
@@ -126,10 +121,9 @@ void PowerPCJITInfo::addPassesToJITCompile(FunctionPassManager &PM) {
// The JIT does not support or need PIC.
PICEnabled = false;
- if (EnablePPCLSR) {
- PM.add(createLoopStrengthReducePass());
- PM.add(createCFGSimplificationPass());
- }
+ // Run loop strength reduction before anything else.
+ PM.add(createLoopStrengthReducePass());
+ PM.add(createCFGSimplificationPass());
// FIXME: Implement efficient support for garbage collection intrinsics.
PM.add(createLowerGCPass());
@@ -140,16 +134,16 @@ void PowerPCJITInfo::addPassesToJITCompile(FunctionPassManager &PM) {
// FIXME: Implement the switch instruction in the instruction selector!
PM.add(createLowerSwitchPass());
- PM.add(createLowerConstantExpressionsPass());
-
// Make sure that no unreachable blocks are instruction selected.
PM.add(createUnreachableBlockEliminationPass());
// Default to pattern ISel
- if (PatternISelTriState == 0)
+ if (PatternISelTriState == 0) {
+ PM.add(createLowerConstantExpressionsPass());
PM.add(createPPC32ISelSimple(TM));
- else
+ } else {
PM.add(createPPC32ISelPattern(TM));
+ }
PM.add(createRegisterAllocator());
PM.add(createPrologEpilogCodeInserter());