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authorArnold Schwaighofer <arnold.schwaighofer@gmail.com>2008-04-30 09:16:33 +0000
committerArnold Schwaighofer <arnold.schwaighofer@gmail.com>2008-04-30 09:16:33 +0000
commit30e62c098b5841259f8026df1c5c45c7c1182a38 (patch)
tree7a4da70d35c785bd6bd03768b4bf7ba3c42e24d2 /lib/Target/PowerPC/PPCRegisterInfo.td
parent4f06a0f6d583691bda2cf6e37d0c35e128bc4b8d (diff)
Tail call optimization improvements:
Move platform independent code (lowering of possibly overwritten arguments, check for tail call optimization eligibility) from target X86ISelectionLowering.cpp to TargetLowering.h and SelectionDAGISel.cpp. Initial PowerPC tail call implementation: Support ppc32 implemented and tested (passes my tests and test-suite llvm-test). Support ppc64 implemented and half tested (passes my tests). On ppc tail call optimization is performed if caller and callee are fastcc call is a tail call (in tail call position, call followed by ret) no variable argument lists or byval arguments option -tailcallopt is enabled Supported: * non pic tail calls on linux/darwin * module-local tail calls on linux(PIC/GOT)/darwin(PIC) * inter-module tail calls on darwin(PIC) If constraints are not met a normal call will be emitted. A test checking the argument lowering behaviour on x86-64 was added. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50477 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/PowerPC/PPCRegisterInfo.td')
-rw-r--r--lib/Target/PowerPC/PPCRegisterInfo.td4
1 files changed, 3 insertions, 1 deletions
diff --git a/lib/Target/PowerPC/PPCRegisterInfo.td b/lib/Target/PowerPC/PPCRegisterInfo.td
index dba17fa9f5..86a8c5cef8 100644
--- a/lib/Target/PowerPC/PPCRegisterInfo.td
+++ b/lib/Target/PowerPC/PPCRegisterInfo.td
@@ -346,4 +346,6 @@ def CRBITRC : RegisterClass<"PPC", [i32], 32,
let CopyCost = -1;
}
-
+
+def CTRRC : RegisterClass<"PPC", [i32], 32, [CTR]>;
+def CTRRC8 : RegisterClass<"PPC", [i64], 64, [CTR8]>;