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| author | Chris Lattner <sabre@nondot.org> | 2006-03-16 20:03:58 +0000 |
|---|---|---|
| committer | Chris Lattner <sabre@nondot.org> | 2006-03-16 20:03:58 +0000 |
| commit | 335fd3c7c2057b4e5fedb3161df44d7bc1759791 (patch) | |
| tree | a0d29c3a4012a27e8438734f8e2e77117b84cac5 /lib/Target/PowerPC/PPCInstrInfo.cpp | |
| parent | 199862b74973198c2ab5a139f664c86713e7b579 (diff) | |
Add support for copying registers. still needed: spilling and reloading them
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26800 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/PowerPC/PPCInstrInfo.cpp')
| -rw-r--r-- | lib/Target/PowerPC/PPCInstrInfo.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/lib/Target/PowerPC/PPCInstrInfo.cpp b/lib/Target/PowerPC/PPCInstrInfo.cpp index c7f33c8a15..429c9780b4 100644 --- a/lib/Target/PowerPC/PPCInstrInfo.cpp +++ b/lib/Target/PowerPC/PPCInstrInfo.cpp @@ -25,7 +25,7 @@ bool PPCInstrInfo::isMoveInstr(const MachineInstr& MI, unsigned& sourceReg, unsigned& destReg) const { MachineOpCode oc = MI.getOpcode(); - if (oc == PPC::OR4 || oc == PPC::OR8 || + if (oc == PPC::OR4 || oc == PPC::OR8 || oc == PPC::VOR || oc == PPC::OR4To8 || oc == PPC::OR8To4) { // or r1, r2, r2 assert(MI.getNumOperands() == 3 && MI.getOperand(0).isRegister() && |