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authorChris Lattner <sabre@nondot.org>2005-08-25 22:03:50 +0000
committerChris Lattner <sabre@nondot.org>2005-08-25 22:03:50 +0000
commitc70b4afce20ad37252d83442a83d84928918264d (patch)
tree6b1be3dd7fd328d8d7c1a030f84b10c5d1cec11e /lib/Target/PowerPC/PPCISelPattern.cpp
parent957fcfbd8935b2973376167861a53e4a9220aefc (diff)
Simplify some code. It's not clear why the UDIV expanded sequence
doesn't work for large uint constants, but we'll keep the current behavior git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23061 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/PowerPC/PPCISelPattern.cpp')
-rw-r--r--lib/Target/PowerPC/PPCISelPattern.cpp20
1 files changed, 7 insertions, 13 deletions
diff --git a/lib/Target/PowerPC/PPCISelPattern.cpp b/lib/Target/PowerPC/PPCISelPattern.cpp
index da07b3040d..4d92e8aed5 100644
--- a/lib/Target/PowerPC/PPCISelPattern.cpp
+++ b/lib/Target/PowerPC/PPCISelPattern.cpp
@@ -1375,29 +1375,23 @@ unsigned ISel::SelectExpr(SDOperand N, bool Recording) {
BuildMI(BB, PPC::ADDZE, 1, Tmp4).addReg(Tmp1);
BuildMI(BB, PPC::NEG, 1, Result).addReg(Tmp4);
return Result;
+ } else if (Tmp3) {
+ ExprMap.erase(N);
+ return SelectExpr(BuildSDIVSequence(N));
}
}
// fall thru
case ISD::UDIV:
// If this is a divide by constant, we can emit code using some magic
// constants to implement it as a multiply instead.
- if (isIntImmediate(N.getOperand(1), Tmp3)) {
- if (opcode == ISD::SDIV) {
- if ((signed)Tmp3 < -1 || (signed)Tmp3 > 1) {
- ExprMap.erase(N);
- return SelectExpr(BuildSDIVSequence(N));
- }
- } else {
- if ((signed)Tmp3 > 1) {
- ExprMap.erase(N);
- return SelectExpr(BuildUDIVSequence(N));
- }
- }
+ if (isIntImmediate(N.getOperand(1), Tmp3) && (signed)Tmp3 > 1) {
+ ExprMap.erase(N);
+ return SelectExpr(BuildUDIVSequence(N));
}
Tmp1 = SelectExpr(N.getOperand(0));
Tmp2 = SelectExpr(N.getOperand(1));
switch (DestType) {
- default: assert(0 && "Unknown type to ISD::SDIV"); break;
+ default: assert(0 && "Unknown type to ISD::DIV"); break;
case MVT::i32: Opc = (ISD::UDIV == opcode) ? PPC::DIVWU : PPC::DIVW; break;
case MVT::f32: Opc = PPC::FDIVS; break;
case MVT::f64: Opc = PPC::FDIV; break;