diff options
author | Chris Lattner <sabre@nondot.org> | 2005-08-26 21:23:58 +0000 |
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committer | Chris Lattner <sabre@nondot.org> | 2005-08-26 21:23:58 +0000 |
commit | 8a2d3ca7dff8f37ee0f1fc0042f47c194045183d (patch) | |
tree | 9eaad9c1dd4ed17730a990ae7d1dfce25a1bf156 /lib/Target/PowerPC/PPCISelLowering.cpp | |
parent | 050967c4d1b97dea9afbe4a27d9e601af63f918f (diff) |
implement SELECT_CC fully for the DAG->DAG isel!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23101 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/PowerPC/PPCISelLowering.cpp')
-rw-r--r-- | lib/Target/PowerPC/PPCISelLowering.cpp | 55 |
1 files changed, 55 insertions, 0 deletions
diff --git a/lib/Target/PowerPC/PPCISelLowering.cpp b/lib/Target/PowerPC/PPCISelLowering.cpp index d84552c5c0..beeb0f8c42 100644 --- a/lib/Target/PowerPC/PPCISelLowering.cpp +++ b/lib/Target/PowerPC/PPCISelLowering.cpp @@ -15,6 +15,7 @@ #include "PPC32TargetMachine.h" #include "llvm/CodeGen/MachineFrameInfo.h" #include "llvm/CodeGen/MachineFunction.h" +#include "llvm/CodeGen/MachineInstrBuilder.h" #include "llvm/CodeGen/SelectionDAG.h" #include "llvm/Constants.h" #include "llvm/Function.h" @@ -553,3 +554,57 @@ LowerFrameReturnAddress(bool isFrameAddress, SDOperand Chain, unsigned Depth, assert(0 && "LowerFrameReturnAddress unimplemented"); abort(); } + +MachineBasicBlock * +PPC32TargetLowering::InsertAtEndOfBasicBlock(MachineInstr *MI, + MachineBasicBlock *BB) { + assert((MI->getOpcode() == PPC::SELECT_CC_Int || + MI->getOpcode() == PPC::SELECT_CC_FP) && + "Unexpected instr type to insert"); + + // To "insert" a SELECT_CC instruction, we actually have to insert the diamond + // control-flow pattern. The incoming instruction knows the destination vreg + // to set, the condition code register to branch on, the true/false values to + // select between, and a branch opcode to use. + const BasicBlock *LLVM_BB = BB->getBasicBlock(); + ilist<MachineBasicBlock>::iterator It = BB; + ++It; + + // thisMBB: + // ... + // TrueVal = ... + // cmpTY ccX, r1, r2 + // bCC copy1MBB + // fallthrough --> copy0MBB + MachineBasicBlock *thisMBB = BB; + MachineBasicBlock *copy0MBB = new MachineBasicBlock(LLVM_BB); + MachineBasicBlock *sinkMBB = new MachineBasicBlock(LLVM_BB); + BuildMI(BB, MI->getOperand(4).getImmedValue(), 2) + .addReg(MI->getOperand(1).getReg()).addMBB(sinkMBB); + MachineFunction *F = BB->getParent(); + F->getBasicBlockList().insert(It, copy0MBB); + F->getBasicBlockList().insert(It, sinkMBB); + // Update machine-CFG edges + BB->addSuccessor(copy0MBB); + BB->addSuccessor(sinkMBB); + + // copy0MBB: + // %FalseValue = ... + // # fallthrough to sinkMBB + BB = copy0MBB; + + // Update machine-CFG edges + BB->addSuccessor(sinkMBB); + + // sinkMBB: + // %Result = phi [ %FalseValue, copy0MBB ], [ %TrueValue, thisMBB ] + // ... + BB = sinkMBB; + BuildMI(BB, PPC::PHI, 4, MI->getOperand(0).getReg()) + .addReg(MI->getOperand(3).getReg()).addMBB(copy0MBB) + .addReg(MI->getOperand(2).getReg()).addMBB(thisMBB); + + delete MI; // The pseudo instruction is gone now. + return BB; +} + |