diff options
author | Owen Anderson <resistor@mac.com> | 2007-09-07 04:06:50 +0000 |
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committer | Owen Anderson <resistor@mac.com> | 2007-09-07 04:06:50 +0000 |
commit | 718cb665ca6ce2bc4d8e8479f46a45db91b49f86 (patch) | |
tree | 51ddca6b6eead9bf38aafd5507e6c3c06048f0ad /lib/Target/PowerPC/PPCISelLowering.cpp | |
parent | af992f782fb2cac8d00b352c3dd73f6e782b5758 (diff) |
Add lengthof and endof templates that hide a lot of sizeof computations.
Patch by Sterling Stein!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41758 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/PowerPC/PPCISelLowering.cpp')
-rw-r--r-- | lib/Target/PowerPC/PPCISelLowering.cpp | 11 |
1 files changed, 6 insertions, 5 deletions
diff --git a/lib/Target/PowerPC/PPCISelLowering.cpp b/lib/Target/PowerPC/PPCISelLowering.cpp index 0528eaf80a..8c7677651a 100644 --- a/lib/Target/PowerPC/PPCISelLowering.cpp +++ b/lib/Target/PowerPC/PPCISelLowering.cpp @@ -16,6 +16,7 @@ #include "PPCPredicates.h" #include "PPCTargetMachine.h" #include "PPCPerfectShuffle.h" +#include "llvm/ADT/STLExtras.h" #include "llvm/ADT/VectorExtras.h" #include "llvm/Analysis/ScalarEvolutionExpressions.h" #include "llvm/CodeGen/CallingConvLower.h" @@ -1264,9 +1265,9 @@ static SDOperand LowerFORMAL_ARGUMENTS(SDOperand Op, SelectionDAG &DAG, PPC::V9, PPC::V10, PPC::V11, PPC::V12, PPC::V13 }; - const unsigned Num_GPR_Regs = sizeof(GPR_32)/sizeof(GPR_32[0]); + const unsigned Num_GPR_Regs = array_lengthof(GPR_32); const unsigned Num_FPR_Regs = isMachoABI ? 13 : 8; - const unsigned Num_VR_Regs = sizeof( VR)/sizeof( VR[0]); + const unsigned Num_VR_Regs = array_lengthof( VR); unsigned GPR_idx = 0, FPR_idx = 0, VR_idx = 0; @@ -1583,9 +1584,9 @@ static SDOperand LowerCALL(SDOperand Op, SelectionDAG &DAG, PPC::V2, PPC::V3, PPC::V4, PPC::V5, PPC::V6, PPC::V7, PPC::V8, PPC::V9, PPC::V10, PPC::V11, PPC::V12, PPC::V13 }; - const unsigned NumGPRs = sizeof(GPR_32)/sizeof(GPR_32[0]); + const unsigned NumGPRs = array_lengthof(GPR_32); const unsigned NumFPRs = isMachoABI ? 13 : 8; - const unsigned NumVRs = sizeof( VR)/sizeof( VR[0]); + const unsigned NumVRs = array_lengthof( VR); const unsigned *GPR = isPPC64 ? GPR_64 : GPR_32; @@ -2399,7 +2400,7 @@ static SDOperand LowerBUILD_VECTOR(SDOperand Op, SelectionDAG &DAG) { -8, 8, -9, 9, -10, 10, -11, 11, -12, 12, -13, 13, 14, -14, 15, -15, -16 }; - for (unsigned idx = 0; idx < sizeof(SplatCsts)/sizeof(SplatCsts[0]); ++idx){ + for (unsigned idx = 0; idx < array_lengthof(SplatCsts); ++idx) { // Indirect through the SplatCsts array so that we favor 'vsplti -1' for // cases which are ambiguous (e.g. formation of 0x8000_0000). 'vsplti -1' int i = SplatCsts[idx]; |