Add the necessary support to codegen condition register logical ops with

  register allocated condition registers.  Make sure that the printed
  output is gas compatible.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21295 91177308-0d34-0410-b5e6-96231b3b80d8

1 files changed, 20 insertions, 0 deletions

diff --git a/lib/Target/PowerPC/PPCAsmPrinter.cpp b/lib/Target/PowerPC/PPCAsmPrinter.cpp
index bfc61675de..4acaca7b51 100644
--- a/lib/Target/PowerPC/PPCAsmPrinter.cpp
+++ b/lib/Target/PowerPC/PPCAsmPrinter.cpp
@@ -138,6 +138,26 @@ namespace {
         O << "-\"L0000" << LabelNumber << "$pb\")";
       }
     }
+    void printcrbit(const MachineInstr *MI, unsigned OpNo,
+                       MVT::ValueType VT) {
+      unsigned char value = MI->getOperand(OpNo).getImmedValue();
+      assert(value <= 3 && "Invalid crbit argument!");
+      unsigned RegNo, CCReg = MI->getOperand(OpNo-1).getReg();
+      switch (CCReg) {
+      case PPC::CR0:  RegNo = 0; break;
+      case PPC::CR1:  RegNo = 1; break;
+      case PPC::CR2:  RegNo = 2; break;
+      case PPC::CR3:  RegNo = 3; break;
+      case PPC::CR4:  RegNo = 4; break;
+      case PPC::CR5:  RegNo = 5; break;
+      case PPC::CR6:  RegNo = 6; break;
+      case PPC::CR7:  RegNo = 7; break;
+      default:
+        std::cerr << "Unhandled reg in enumRegToRealReg!\n";
+        abort();
+      }
+      O << 4 * RegNo + value;
+    }
   
     virtual void printConstantPool(MachineConstantPool *MCP) = 0;
     virtual bool runOnMachineFunction(MachineFunction &F) = 0;