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authorEvan Cheng <evan.cheng@apple.com>2011-07-19 06:37:02 +0000
committerEvan Cheng <evan.cheng@apple.com>2011-07-19 06:37:02 +0000
commit439661395fd2a2a832dba01c65bc88718528313c (patch)
treee8091900c4d2f3278f5237358edeb7f22275cb77 /lib/Target/Mips/MipsTargetMachine.cpp
parent939ece1b5c6c2f142476b477daa573046fa1b8da (diff)
Introduce MCCodeGenInfo, which keeps information that can affect codegen
(including compilation, assembly). Move relocation model Reloc::Model from TargetMachine to MCCodeGenInfo so it's accessible even without TargetMachine. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135468 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/Mips/MipsTargetMachine.cpp')
-rw-r--r--lib/Target/Mips/MipsTargetMachine.cpp19
1 files changed, 6 insertions, 13 deletions
diff --git a/lib/Target/Mips/MipsTargetMachine.cpp b/lib/Target/Mips/MipsTargetMachine.cpp
index 20b9f4ea38..a195a48961 100644
--- a/lib/Target/Mips/MipsTargetMachine.cpp
+++ b/lib/Target/Mips/MipsTargetMachine.cpp
@@ -31,10 +31,10 @@ extern "C" void LLVMInitializeMipsTarget() {
// an easier handling.
// Using CodeModel::Large enables different CALL behavior.
MipsTargetMachine::
-MipsTargetMachine(const Target &T, const std::string &TT,
- const std::string &CPU, const std::string &FS,
+MipsTargetMachine(const Target &T, StringRef TT,
+ StringRef CPU, StringRef FS, Reloc::Model RM,
bool isLittle=false):
- LLVMTargetMachine(T, TT, CPU, FS),
+ LLVMTargetMachine(T, TT, CPU, FS, RM),
Subtarget(TT, CPU, FS, isLittle),
DataLayout(isLittle ?
std::string("e-p:32:32:32-i8:8:32-i16:16:32-i64:64:64-n32") :
@@ -42,19 +42,12 @@ MipsTargetMachine(const Target &T, const std::string &TT,
InstrInfo(*this),
FrameLowering(Subtarget),
TLInfo(*this), TSInfo(*this) {
- // Abicall enables PIC by default
- if (getRelocationModel() == Reloc::Default) {
- if (Subtarget.isABI_O32())
- setRelocationModel(Reloc::PIC_);
- else
- setRelocationModel(Reloc::Static);
- }
}
MipselTargetMachine::
-MipselTargetMachine(const Target &T, const std::string &TT,
- const std::string &CPU, const std::string &FS) :
- MipsTargetMachine(T, TT, CPU, FS, true) {}
+MipselTargetMachine(const Target &T, StringRef TT,
+ StringRef CPU, StringRef FS, Reloc::Model RM) :
+ MipsTargetMachine(T, TT, CPU, FS, RM, true) {}
// Install an instruction selector pass using
// the ISelDag to gen Mips code.