diff options
| author | Akira Hatanaka <ahatanaka@mips.com> | 2012-11-03 00:05:43 +0000 |
|---|---|---|
| committer | Akira Hatanaka <ahatanaka@mips.com> | 2012-11-03 00:05:43 +0000 |
| commit | 11a45c214c26bdc49ef58c0eb214df5200867cee (patch) | |
| tree | 7d61dd7da91f5665a099673d976410ae00b013f8 /lib/Target/Mips/MipsSEFrameLowering.cpp | |
| parent | da15a0ed4cd74f767cc124b65b7b7d9482969318 (diff) | |
[mips] Stop reserving register AT and use register scavenger when a scratch
register is needed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167341 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/Mips/MipsSEFrameLowering.cpp')
| -rw-r--r-- | lib/Target/Mips/MipsSEFrameLowering.cpp | 14 |
1 files changed, 14 insertions, 0 deletions
diff --git a/lib/Target/Mips/MipsSEFrameLowering.cpp b/lib/Target/Mips/MipsSEFrameLowering.cpp index 16a6757d66..03f5176b29 100644 --- a/lib/Target/Mips/MipsSEFrameLowering.cpp +++ b/lib/Target/Mips/MipsSEFrameLowering.cpp @@ -22,6 +22,7 @@ #include "llvm/CodeGen/MachineInstrBuilder.h" #include "llvm/CodeGen/MachineModuleInfo.h" #include "llvm/CodeGen/MachineRegisterInfo.h" +#include "llvm/CodeGen/RegisterScavenging.h" #include "llvm/DataLayout.h" #include "llvm/Target/TargetOptions.h" #include "llvm/Support/CommandLine.h" @@ -202,6 +203,19 @@ processFunctionBeforeCalleeSavedScan(MachineFunction &MF, // Mark $fp as used if function has dedicated frame pointer. if (hasFP(MF)) MRI.setPhysRegUsed(FP); + + // Set scavenging frame index if necessary. + uint64_t MaxSPOffset = MF.getInfo<MipsFunctionInfo>()->getIncomingArgSize() + + estimateStackSize(MF); + + if (isInt<16>(MaxSPOffset)) + return; + + const TargetRegisterClass *RC = STI.isABI_N64() ? + &Mips::CPU64RegsRegClass : &Mips::CPURegsRegClass; + int FI = MF.getFrameInfo()->CreateStackObject(RC->getSize(), + RC->getAlignment(), false); + RS->setScavengingFrameIndex(FI); } const MipsFrameLowering * |
