diff options
| author | Rafael Espindola <rafael.espindola@gmail.com> | 2010-06-02 20:02:30 +0000 |
|---|---|---|
| committer | Rafael Espindola <rafael.espindola@gmail.com> | 2010-06-02 20:02:30 +0000 |
| commit | 42d075c4fb21995265961501cec9ff6e3fb497ce (patch) | |
| tree | ae922ac83ab0ea665984e8e30ac103ca55dde626 /lib/Target/Mips/MipsRegisterInfo.cpp | |
| parent | 962f549d207337c03f7d1d1a120860034a52a0e7 (diff) | |
Remove the TargetRegisterClass member from CalleeSavedInfo
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105344 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/Mips/MipsRegisterInfo.cpp')
| -rw-r--r-- | lib/Target/Mips/MipsRegisterInfo.cpp | 7 |
1 files changed, 4 insertions, 3 deletions
diff --git a/lib/Target/Mips/MipsRegisterInfo.cpp b/lib/Target/Mips/MipsRegisterInfo.cpp index 60fcb70919..e15f0a58e5 100644 --- a/lib/Target/Mips/MipsRegisterInfo.cpp +++ b/lib/Target/Mips/MipsRegisterInfo.cpp @@ -251,7 +251,8 @@ void MipsRegisterInfo::adjustMipsStackFrame(MachineFunction &MF) const StackOffset = ((StackOffset+StackAlign-1)/StackAlign*StackAlign); for (unsigned i = 0, e = CSI.size(); i != e ; ++i) { - if (CSI[i].getRegClass() != Mips::CPURegsRegisterClass) + unsigned Reg = CSI[i].getReg(); + if (!Mips::CPURegsRegisterClass->contains(Reg)) break; MFI->setObjectOffset(CSI[i].getFrameIdx(), StackOffset); TopCPUSavedRegOff = StackOffset; @@ -283,7 +284,8 @@ void MipsRegisterInfo::adjustMipsStackFrame(MachineFunction &MF) const // Adjust FPU Callee Saved Registers Area. This Area must be // aligned to the default Stack Alignment requirements. for (unsigned i = 0, e = CSI.size(); i != e; ++i) { - if (CSI[i].getRegClass() == Mips::CPURegsRegisterClass) + unsigned Reg = CSI[i].getReg(); + if (Mips::CPURegsRegisterClass->contains(Reg)) continue; MFI->setObjectOffset(CSI[i].getFrameIdx(), StackOffset); TopFPUSavedRegOff = StackOffset; @@ -500,4 +502,3 @@ getDwarfRegNum(unsigned RegNum, bool isEH) const { } #include "MipsGenRegisterInfo.inc" - |