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| author | Craig Topper <craig.topper@gmail.com> | 2012-04-20 07:30:17 +0000 |
|---|---|---|
| committer | Craig Topper <craig.topper@gmail.com> | 2012-04-20 07:30:17 +0000 |
| commit | 420761a0f193e87d08ee1c51b26bba23ab4bac7f (patch) | |
| tree | 55aa0936b18927fe72fb4806eeab177b42c2f9cd /lib/Target/Mips/MipsMachineFunction.cpp | |
| parent | c909950c384e8234a7b3c5a76b7f79e3f7012ceb (diff) | |
Convert more uses of XXXRegisterClass to &XXXRegClass. No functional change since they are equivalent.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155188 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/Mips/MipsMachineFunction.cpp')
| -rw-r--r-- | lib/Target/Mips/MipsMachineFunction.cpp | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/lib/Target/Mips/MipsMachineFunction.cpp b/lib/Target/Mips/MipsMachineFunction.cpp index b00c62b09f..9d3a27b518 100644 --- a/lib/Target/Mips/MipsMachineFunction.cpp +++ b/lib/Target/Mips/MipsMachineFunction.cpp @@ -40,9 +40,9 @@ unsigned MipsFunctionInfo::getGlobalBaseReg() { if (FixGlobalBaseReg) // $gp is the global base register. return GlobalBaseReg = ST.isABI_N64() ? Mips::GP_64 : Mips::GP; - const TargetRegisterClass *RC; - RC = ST.isABI_N64() ? - Mips::CPU64RegsRegisterClass : Mips::CPURegsRegisterClass; + const TargetRegisterClass *RC = ST.isABI_N64() ? + (const TargetRegisterClass*)&Mips::CPU64RegsRegClass : + (const TargetRegisterClass*)&Mips::CPURegsRegClass; return GlobalBaseReg = MF.getRegInfo().createVirtualRegister(RC); } |