aboutsummaryrefslogtreecommitdiff
path: root/lib/Target/Mips/MipsISelLowering.cpp
diff options
context:
space:
mode:
authorEvan Cheng <evan.cheng@apple.com>2009-10-27 19:56:55 +0000
committerEvan Cheng <evan.cheng@apple.com>2009-10-27 19:56:55 +0000
commiteb2f969a4ddfb0bc8fdcb5bce3b52e53abff321d (patch)
treead532e623f4f409af02ef9eef7d576ad8184978b /lib/Target/Mips/MipsISelLowering.cpp
parentf3b0d1a555eaa46931e4ec1b11e434e8cba2b5d7 (diff)
Do away with addLegalFPImmediate. Add a target hook isFPImmLegal which returns true if the fp immediate can be natively codegened by target.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85281 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/Mips/MipsISelLowering.cpp')
-rw-r--r--lib/Target/Mips/MipsISelLowering.cpp7
1 files changed, 4 insertions, 3 deletions
diff --git a/lib/Target/Mips/MipsISelLowering.cpp b/lib/Target/Mips/MipsISelLowering.cpp
index ab8790ad7d..48d1cdc08a 100644
--- a/lib/Target/Mips/MipsISelLowering.cpp
+++ b/lib/Target/Mips/MipsISelLowering.cpp
@@ -72,9 +72,6 @@ MipsTargetLowering(MipsTargetMachine &TM)
if (!Subtarget->isFP64bit())
addRegisterClass(MVT::f64, Mips::AFGR64RegisterClass);
- // Legal fp constants
- addLegalFPImmediate(APFloat(+0.0f));
-
// Load extented operations for i1 types must be promoted
setLoadExtAction(ISD::EXTLOAD, MVT::i1, Promote);
setLoadExtAction(ISD::ZEXTLOAD, MVT::i1, Promote);
@@ -1224,3 +1221,7 @@ MipsTargetLowering::isOffsetFoldingLegal(const GlobalAddressSDNode *GA) const {
// The Mips target isn't yet aware of offsets.
return false;
}
+
+bool MipsTargetLowering::isFPImmLegal(const APFloat &Imm) const {
+ return Imm.isZero();
+}