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authorBenjamin Kramer <benny.kra@googlemail.com>2011-12-27 11:41:05 +0000
committerBenjamin Kramer <benny.kra@googlemail.com>2011-12-27 11:41:05 +0000
commit27baab62e7d6267d9b18e4665c6bb1b75dae10d4 (patch)
tree8a21976c7f97f5c8fd7970be26c2052d7b339fe4 /lib/Target/Hexagon/HexagonExpandPredSpillCode.cpp
parent3738ccd7eb99d75cbe31777a98675e5e5c23fee3 (diff)
Clean up some Release build warnings.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147289 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/Hexagon/HexagonExpandPredSpillCode.cpp')
-rw-r--r--lib/Target/Hexagon/HexagonExpandPredSpillCode.cpp5
1 files changed, 2 insertions, 3 deletions
diff --git a/lib/Target/Hexagon/HexagonExpandPredSpillCode.cpp b/lib/Target/Hexagon/HexagonExpandPredSpillCode.cpp
index cb73ae0039..965d482acf 100644
--- a/lib/Target/Hexagon/HexagonExpandPredSpillCode.cpp
+++ b/lib/Target/Hexagon/HexagonExpandPredSpillCode.cpp
@@ -70,7 +70,6 @@ char HexagonExpandPredSpillCode::ID = 0;
bool HexagonExpandPredSpillCode::runOnMachineFunction(MachineFunction &Fn) {
const HexagonInstrInfo *TII = QTM.getInstrInfo();
- const HexagonRegisterInfo *RegInfo = QTM.getRegisterInfo();
// Loop over all of the basic blocks.
for (MachineFunction::iterator MBBb = Fn.begin(), MBBe = Fn.end();
@@ -84,7 +83,7 @@ bool HexagonExpandPredSpillCode::runOnMachineFunction(MachineFunction &Fn) {
if (Opc == Hexagon::STriw_pred) {
// STriw_pred [R30], ofst, SrcReg;
unsigned FP = MI->getOperand(0).getReg();
- assert(FP == RegInfo->getFrameRegister() &&
+ assert(FP == QTM.getRegisterInfo()->getFrameRegister() &&
"Not a Frame Pointer, Nor a Spill Slot");
assert(MI->getOperand(1).isImm() && "Not an offset");
int Offset = MI->getOperand(1).getImm();
@@ -129,7 +128,7 @@ bool HexagonExpandPredSpillCode::runOnMachineFunction(MachineFunction &Fn) {
assert(Hexagon::PredRegsRegClass.contains(DstReg) &&
"Not a predicate register");
unsigned FP = MI->getOperand(1).getReg();
- assert(FP == RegInfo->getFrameRegister() &&
+ assert(FP == QTM.getRegisterInfo()->getFrameRegister() &&
"Not a Frame Pointer, Nor a Spill Slot");
assert(MI->getOperand(2).isImm() && "Not an offset");
int Offset = MI->getOperand(2).getImm();