diff options
author | Jia Liu <proljc@gmail.com> | 2012-02-18 12:03:15 +0000 |
---|---|---|
committer | Jia Liu <proljc@gmail.com> | 2012-02-18 12:03:15 +0000 |
commit | 31d157ae1ac2cd9c787dc3c1d28e64c682803844 (patch) | |
tree | f26bc6f243960a904162b8ef10f0687800a41191 /lib/Target/CellSPU | |
parent | 107506f814f42af4a905156e7ce5dd9a2ca6c0c7 (diff) |
Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430, PPC, PTX, Sparc, X86, XCore.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150878 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/CellSPU')
24 files changed, 35 insertions, 35 deletions
diff --git a/lib/Target/CellSPU/CellSDKIntrinsics.td b/lib/Target/CellSPU/CellSDKIntrinsics.td index 9468aee067..cdb4099ffb 100644 --- a/lib/Target/CellSPU/CellSDKIntrinsics.td +++ b/lib/Target/CellSPU/CellSDKIntrinsics.td @@ -1,5 +1,5 @@ //===-- CellSDKIntrinsics.td - Cell SDK Intrinsics ---------*- tablegen -*-===// -// +// // The LLVM Compiler Infrastructure // // This file is distributed under the University of Illinois Open Source diff --git a/lib/Target/CellSPU/MCTargetDesc/SPUMCTargetDesc.cpp b/lib/Target/CellSPU/MCTargetDesc/SPUMCTargetDesc.cpp index 0d36498fda..8450e2c663 100644 --- a/lib/Target/CellSPU/MCTargetDesc/SPUMCTargetDesc.cpp +++ b/lib/Target/CellSPU/MCTargetDesc/SPUMCTargetDesc.cpp @@ -1,4 +1,4 @@ -//===-- SPUMCTargetDesc.cpp - Cell SPU Target Descriptions -----*- C++ -*-===// +//===-- SPUMCTargetDesc.cpp - Cell SPU Target Descriptions ----------------===// // // The LLVM Compiler Infrastructure // diff --git a/lib/Target/CellSPU/SPU.h b/lib/Target/CellSPU/SPU.h index b51fbc7a51..c660131706 100644 --- a/lib/Target/CellSPU/SPU.h +++ b/lib/Target/CellSPU/SPU.h @@ -1,4 +1,4 @@ -//===-- SPU.h - Top-level interface for Cell SPU Target ----------*- C++ -*-==// +//===-- SPU.h - Top-level interface for Cell SPU Target ---------*- C++ -*-===// // // The LLVM Compiler Infrastructure // diff --git a/lib/Target/CellSPU/SPU.td b/lib/Target/CellSPU/SPU.td index 8327fe03d7..e835b9cac8 100644 --- a/lib/Target/CellSPU/SPU.td +++ b/lib/Target/CellSPU/SPU.td @@ -1,5 +1,5 @@ -//===- SPU.td - Describe the STI Cell SPU Target Machine ----*- tablegen -*-===// -// +//===-- SPU.td - Describe the STI Cell SPU Target Machine --*- tablegen -*-===// +// // The LLVM Compiler Infrastructure // // This file is distributed under the University of Illinois Open Source diff --git a/lib/Target/CellSPU/SPU128InstrInfo.td b/lib/Target/CellSPU/SPU128InstrInfo.td index 3031fda543..e051e04733 100644 --- a/lib/Target/CellSPU/SPU128InstrInfo.td +++ b/lib/Target/CellSPU/SPU128InstrInfo.td @@ -1,9 +1,9 @@ -//===--- SPU128InstrInfo.td - Cell SPU 128-bit operations -*- tablegen -*--===// +//===-- SPU128InstrInfo.td - Cell SPU 128-bit operations --*- tablegen -*--===// // // Cell SPU 128-bit operations // //===----------------------------------------------------------------------===// - + // zext 32->128: Zero extend 32-bit to 128-bit def : Pat<(i128 (zext R32C:$rSrc)), (ROTQMBYIr128_zext_r32 R32C:$rSrc, 12)>; diff --git a/lib/Target/CellSPU/SPU64InstrInfo.td b/lib/Target/CellSPU/SPU64InstrInfo.td index f340edfb0f..bea33b5362 100644 --- a/lib/Target/CellSPU/SPU64InstrInfo.td +++ b/lib/Target/CellSPU/SPU64InstrInfo.td @@ -1,4 +1,4 @@ -//====--- SPU64InstrInfo.td - Cell SPU 64-bit operations -*- tablegen -*--====// +//====-- SPU64InstrInfo.td - Cell SPU 64-bit operations ---*- tablegen -*--===// // // Cell SPU 64-bit operations // diff --git a/lib/Target/CellSPU/SPUAsmPrinter.cpp b/lib/Target/CellSPU/SPUAsmPrinter.cpp index f232ec7f78..14021fef05 100644 --- a/lib/Target/CellSPU/SPUAsmPrinter.cpp +++ b/lib/Target/CellSPU/SPUAsmPrinter.cpp @@ -1,4 +1,4 @@ -//===-- SPUAsmPrinter.cpp - Print machine instrs to Cell SPU assembly -------=// +//===-- SPUAsmPrinter.cpp - Print machine instrs to Cell SPU assembly -----===// // // The LLVM Compiler Infrastructure // diff --git a/lib/Target/CellSPU/SPUCallingConv.td b/lib/Target/CellSPU/SPUCallingConv.td index 04fa2ae866..9f9692bf67 100644 --- a/lib/Target/CellSPU/SPUCallingConv.td +++ b/lib/Target/CellSPU/SPUCallingConv.td @@ -1,10 +1,10 @@ //===- SPUCallingConv.td - Calling Conventions for CellSPU -*- tablegen -*-===// -// +// // The LLVM Compiler Infrastructure // // This file is distributed under the University of Illinois Open Source // License. See LICENSE.TXT for details. -// +// //===----------------------------------------------------------------------===// // // This describes the calling conventions for the STI Cell SPU architecture. diff --git a/lib/Target/CellSPU/SPUFrameLowering.h b/lib/Target/CellSPU/SPUFrameLowering.h index b837f2cf94..11c52818dd 100644 --- a/lib/Target/CellSPU/SPUFrameLowering.h +++ b/lib/Target/CellSPU/SPUFrameLowering.h @@ -1,4 +1,4 @@ -//=====-- SPUFrameLowering.h - SPU Frame Lowering stuff -*- C++ -*----========// +//===-- SPUFrameLowering.h - SPU Frame Lowering stuff ----------*- C++ -*--===// // // The LLVM Compiler Infrastructure // diff --git a/lib/Target/CellSPU/SPUInstrBuilder.h b/lib/Target/CellSPU/SPUInstrBuilder.h index 5e268f8767..b495537fc2 100644 --- a/lib/Target/CellSPU/SPUInstrBuilder.h +++ b/lib/Target/CellSPU/SPUInstrBuilder.h @@ -1,4 +1,4 @@ -//==-- SPUInstrBuilder.h - Aides for building Cell SPU insts -----*- C++ -*-==// +//===-- SPUInstrBuilder.h - Aides for building Cell SPU insts ---*- C++ -*-===// // // The LLVM Compiler Infrastructure // diff --git a/lib/Target/CellSPU/SPUInstrFormats.td b/lib/Target/CellSPU/SPUInstrFormats.td index bdbe2552dc..cd3f422143 100644 --- a/lib/Target/CellSPU/SPUInstrFormats.td +++ b/lib/Target/CellSPU/SPUInstrFormats.td @@ -1,10 +1,10 @@ -//==== SPUInstrFormats.td - Cell SPU Instruction Formats ---*- tablegen -*-===// -// +//===-- SPUInstrFormats.td - Cell SPU Instruction Formats --*- tablegen -*-===// +// // The LLVM Compiler Infrastructure // // This file is distributed under the University of Illinois Open Source // License. See LICENSE.TXT for details. -// +// //===----------------------------------------------------------------------===// //===----------------------------------------------------------------------===// diff --git a/lib/Target/CellSPU/SPUInstrInfo.cpp b/lib/Target/CellSPU/SPUInstrInfo.cpp index 007bc0e02c..759923d7bb 100644 --- a/lib/Target/CellSPU/SPUInstrInfo.cpp +++ b/lib/Target/CellSPU/SPUInstrInfo.cpp @@ -1,4 +1,4 @@ -//===- SPUInstrInfo.cpp - Cell SPU Instruction Information ----------------===// +//===-- SPUInstrInfo.cpp - Cell SPU Instruction Information ---------------===// // // The LLVM Compiler Infrastructure // diff --git a/lib/Target/CellSPU/SPUInstrInfo.h b/lib/Target/CellSPU/SPUInstrInfo.h index bc1ba71f7a..f0d21adc84 100644 --- a/lib/Target/CellSPU/SPUInstrInfo.h +++ b/lib/Target/CellSPU/SPUInstrInfo.h @@ -1,4 +1,4 @@ -//===- SPUInstrInfo.h - Cell SPU Instruction Information --------*- C++ -*-===// +//===-- SPUInstrInfo.h - Cell SPU Instruction Information -------*- C++ -*-===// // // The LLVM Compiler Infrastructure // diff --git a/lib/Target/CellSPU/SPUMachineFunction.cpp b/lib/Target/CellSPU/SPUMachineFunction.cpp index 5df522ef55..3e948d071d 100644 --- a/lib/Target/CellSPU/SPUMachineFunction.cpp +++ b/lib/Target/CellSPU/SPUMachineFunction.cpp @@ -1,4 +1,4 @@ -//==-- SPUMachineFunctionInfo.cpp - Private data used for CellSPU -*- C++ -*-=// +//==-- SPUMachineFunctionInfo.cpp - Private data used for CellSPU ---------===// // // The LLVM Compiler Infrastructure // diff --git a/lib/Target/CellSPU/SPUMathInstr.td b/lib/Target/CellSPU/SPUMathInstr.td index ed7129e332..9a5c3976af 100644 --- a/lib/Target/CellSPU/SPUMathInstr.td +++ b/lib/Target/CellSPU/SPUMathInstr.td @@ -1,4 +1,4 @@ -//======--- SPUMathInst.td - Cell SPU math operations -*- tablegen -*---======// +//===-- SPUMathInst.td - Cell SPU math operations ---------*- tablegen -*--===// // // Cell SPU math operations // diff --git a/lib/Target/CellSPU/SPUNodes.td b/lib/Target/CellSPU/SPUNodes.td index a6e621f36b..a47e9ef016 100644 --- a/lib/Target/CellSPU/SPUNodes.td +++ b/lib/Target/CellSPU/SPUNodes.td @@ -1,4 +1,4 @@ -//===- SPUNodes.td - Specialized SelectionDAG nodes used for CellSPU ------===// +//=== SPUNodes.td - Specialized SelectionDAG nodes by CellSPU -*- tablegen -*-// // // The LLVM Compiler Infrastructure // diff --git a/lib/Target/CellSPU/SPUNopFiller.cpp b/lib/Target/CellSPU/SPUNopFiller.cpp index e2bd2d7f41..7c58041e3b 100644 --- a/lib/Target/CellSPU/SPUNopFiller.cpp +++ b/lib/Target/CellSPU/SPUNopFiller.cpp @@ -1,4 +1,4 @@ -//===-- SPUNopFiller.cpp - Add nops/lnops to align the pipelines---===// +//===-- SPUNopFiller.cpp - Add nops/lnops to align the pipelines ----------===// // // The LLVM Compiler Infrastructure // diff --git a/lib/Target/CellSPU/SPUOperands.td b/lib/Target/CellSPU/SPUOperands.td index 96cde51709..6f8deef553 100644 --- a/lib/Target/CellSPU/SPUOperands.td +++ b/lib/Target/CellSPU/SPUOperands.td @@ -1,10 +1,10 @@ -//===- SPUOperands.td - Cell SPU Instruction Operands ------*- tablegen -*-===// -// +//===-- SPUOperands.td - Cell SPU Instruction Operands -----*- tablegen -*-===// +// // The LLVM Compiler Infrastructure // // This file is distributed under the University of Illinois Open Source // License. See LICENSE.TXT for details. -// +// //===----------------------------------------------------------------------===// // Cell SPU Instruction Operands: //===----------------------------------------------------------------------===// diff --git a/lib/Target/CellSPU/SPURegisterInfo.cpp b/lib/Target/CellSPU/SPURegisterInfo.cpp index bbac6fd0be..f4dd44105d 100644 --- a/lib/Target/CellSPU/SPURegisterInfo.cpp +++ b/lib/Target/CellSPU/SPURegisterInfo.cpp @@ -1,4 +1,4 @@ -//===- SPURegisterInfo.cpp - Cell SPU Register Information ----------------===// +//===-- SPURegisterInfo.cpp - Cell SPU Register Information ---------------===// // // The LLVM Compiler Infrastructure // diff --git a/lib/Target/CellSPU/SPURegisterInfo.h b/lib/Target/CellSPU/SPURegisterInfo.h index b7818a47ab..2e95247d65 100644 --- a/lib/Target/CellSPU/SPURegisterInfo.h +++ b/lib/Target/CellSPU/SPURegisterInfo.h @@ -1,4 +1,4 @@ -//===- SPURegisterInfo.h - Cell SPU Register Information Impl ----*- C++ -*-==// +//===-- SPURegisterInfo.h - Cell SPU Register Information Impl --*- C++ -*-===// // // The LLVM Compiler Infrastructure // diff --git a/lib/Target/CellSPU/SPURegisterInfo.td b/lib/Target/CellSPU/SPURegisterInfo.td index e16f51ff0e..f27b042edd 100644 --- a/lib/Target/CellSPU/SPURegisterInfo.td +++ b/lib/Target/CellSPU/SPURegisterInfo.td @@ -1,10 +1,10 @@ -//===- SPURegisterInfo.td - The Cell SPU Register File -----*- tablegen -*-===// -// +//===-- SPURegisterInfo.td - The Cell SPU Register File ----*- tablegen -*-===// +// // The LLVM Compiler Infrastructure // // This file is distributed under the University of Illinois Open Source // License. See LICENSE.TXT for details. -// +// //===----------------------------------------------------------------------===// // // diff --git a/lib/Target/CellSPU/SPUSchedule.td b/lib/Target/CellSPU/SPUSchedule.td index 9cd3c2327d..9ccd0844e4 100644 --- a/lib/Target/CellSPU/SPUSchedule.td +++ b/lib/Target/CellSPU/SPUSchedule.td @@ -1,10 +1,10 @@ -//===- SPUSchedule.td - Cell Scheduling Definitions --------*- tablegen -*-===// -// +//===-- SPUSchedule.td - Cell Scheduling Definitions -------*- tablegen -*-===// +// // The LLVM Compiler Infrastructure // // This file is distributed under the University of Illinois Open Source // License. See LICENSE.TXT for details. -// +// //===----------------------------------------------------------------------===// //===----------------------------------------------------------------------===// diff --git a/lib/Target/CellSPU/SPUSubtarget.cpp b/lib/Target/CellSPU/SPUSubtarget.cpp index 43335abf0a..ebfefe2bb4 100644 --- a/lib/Target/CellSPU/SPUSubtarget.cpp +++ b/lib/Target/CellSPU/SPUSubtarget.cpp @@ -1,4 +1,4 @@ -//===- SPUSubtarget.cpp - STI Cell SPU Subtarget Information --------------===// +//===-- SPUSubtarget.cpp - STI Cell SPU Subtarget Information -------------===// // // The LLVM Compiler Infrastructure // diff --git a/lib/Target/CellSPU/SPUTargetMachine.h b/lib/Target/CellSPU/SPUTargetMachine.h index 5daf7a5cfe..c179292e58 100644 --- a/lib/Target/CellSPU/SPUTargetMachine.h +++ b/lib/Target/CellSPU/SPUTargetMachine.h @@ -1,4 +1,4 @@ -//===-- SPUTargetMachine.h - Define TargetMachine for Cell SPU ----*- C++ -*-=// +//===-- SPUTargetMachine.h - Define TargetMachine for Cell SPU --*- C++ -*-===// // // The LLVM Compiler Infrastructure // |