diff options
author | Andrew Lenharth <andrewl@lenharth.org> | 2005-03-03 19:03:21 +0000 |
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committer | Andrew Lenharth <andrewl@lenharth.org> | 2005-03-03 19:03:21 +0000 |
commit | f3f475efee6130292d84be4a5f94f26f55d88eda (patch) | |
tree | 8cca320fe1fb5afe592547a5d1ff562449a3e14b /lib/Target/Alpha/AlphaTargetMachine.cpp | |
parent | f7fe494c198d946c57a6275d0ec18c517f4022bd (diff) |
LSR cleanup patch
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20422 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/Alpha/AlphaTargetMachine.cpp')
-rw-r--r-- | lib/Target/Alpha/AlphaTargetMachine.cpp | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/lib/Target/Alpha/AlphaTargetMachine.cpp b/lib/Target/Alpha/AlphaTargetMachine.cpp index 80a88662a1..7bc4852105 100644 --- a/lib/Target/Alpha/AlphaTargetMachine.cpp +++ b/lib/Target/Alpha/AlphaTargetMachine.cpp @@ -60,8 +60,10 @@ AlphaTargetMachine::AlphaTargetMachine( const Module &M, IntrinsicLowering *IL) bool AlphaTargetMachine::addPassesToEmitAssembly(PassManager &PM, std::ostream &Out) { - if (EnableAlphaLSR) + if (EnableAlphaLSR) { PM.add(createLoopStrengthReducePass()); + PM.add(createCFGSimplificationPass()); + } // FIXME: Implement efficient support for garbage collection intrinsics. PM.add(createLowerGCPass()); |