diff options
| author | Evan Cheng <evan.cheng@apple.com> | 2010-05-06 19:06:44 +0000 |
|---|---|---|
| committer | Evan Cheng <evan.cheng@apple.com> | 2010-05-06 19:06:44 +0000 |
| commit | 746ad69e088176819981b4b2c5ac8dcd49f5e60e (patch) | |
| tree | 3d70dab0c9e93a141b33c330e33de8dddbd2bd87 /lib/Target/Alpha/AlphaInstrInfo.cpp | |
| parent | ac963b32796b16eb2e63a6bf00d41070266b9d9a (diff) | |
Add argument TargetRegisterInfo to loadRegFromStackSlot and storeRegToStackSlot.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103193 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/Alpha/AlphaInstrInfo.cpp')
| -rw-r--r-- | lib/Target/Alpha/AlphaInstrInfo.cpp | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/lib/Target/Alpha/AlphaInstrInfo.cpp b/lib/Target/Alpha/AlphaInstrInfo.cpp index 9b7e42e177..a4df40c199 100644 --- a/lib/Target/Alpha/AlphaInstrInfo.cpp +++ b/lib/Target/Alpha/AlphaInstrInfo.cpp @@ -180,7 +180,8 @@ void AlphaInstrInfo::storeRegToStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, unsigned SrcReg, bool isKill, int FrameIdx, - const TargetRegisterClass *RC) const { + const TargetRegisterClass *RC, + const TargetRegisterInfo *TRI) const { //cerr << "Trying to store " << getPrettyName(SrcReg) << " to " // << FrameIdx << "\n"; //BuildMI(MBB, MI, Alpha::WTF, 0).addReg(SrcReg); @@ -208,7 +209,8 @@ void AlphaInstrInfo::loadRegFromStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, unsigned DestReg, int FrameIdx, - const TargetRegisterClass *RC) const { + const TargetRegisterClass *RC, + const TargetRegisterInfo *TRI) const { //cerr << "Trying to load " << getPrettyName(DestReg) << " to " // << FrameIdx << "\n"; DebugLoc DL; |