diff options
| author | Andrew Lenharth <andrewl@lenharth.org> | 2005-06-29 12:23:34 +0000 |
|---|---|---|
| committer | Andrew Lenharth <andrewl@lenharth.org> | 2005-06-29 12:23:34 +0000 |
| commit | ba5dc44b00537fffb5a0fbc36906fff17de1b5af (patch) | |
| tree | 35a97530be92dd249449264f54d5fbe59bf164db /lib/Target/Alpha/AlphaISelPattern.cpp | |
| parent | fce587e58b88d1a10921c09acc6951b2e38d76f6 (diff) | |
fix most regressions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22307 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/Alpha/AlphaISelPattern.cpp')
| -rw-r--r-- | lib/Target/Alpha/AlphaISelPattern.cpp | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/lib/Target/Alpha/AlphaISelPattern.cpp b/lib/Target/Alpha/AlphaISelPattern.cpp index eef0d8410d..b4e94936bd 100644 --- a/lib/Target/Alpha/AlphaISelPattern.cpp +++ b/lib/Target/Alpha/AlphaISelPattern.cpp @@ -1289,7 +1289,8 @@ unsigned AlphaISel::SelectExpr(SDOperand N) { } if ((DestType == MVT::f64 || DestType == MVT::f32) - && opcode != ISD::CALL && opcode != ISD::TAILCALL) + && opcode != ISD::CALL && opcode != ISD::TAILCALL + && opcode != ISD::CopyFromReg && opcode != ISD::LOAD) return SelectExprFP(N, Result); switch (opcode) { |